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Date: Fri, 29 Dec 2023 16:43:37 +0100
From: Johan Hovold <johan@...nel.org>
To: Konrad Dybcio <konrad.dybcio@...aro.org>
Cc: Bjorn Andersson <andersson@...nel.org>,
	Rob Herring <robh+dt@...nel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
	Conor Dooley <conor+dt@...nel.org>,
	Johan Hovold <johan+linaro@...nel.org>,
	Marijn Suijten <marijn.suijten@...ainline.org>,
	linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
	linux-kernel@...r.kernel.org,
	Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>,
	Konrad Dybcio <konrad.dybcio@...ainline.org>
Subject: Re: [PATCH 2/3] arm64: dts: qcom: sc8280xp: Correct USB PHY power
 domains

On Fri, Dec 29, 2023 at 04:05:18PM +0100, Konrad Dybcio wrote:
> On 29.12.2023 14:25, Johan Hovold wrote:

> > On Fri, Dec 29, 2023 at 02:06:26PM +0100, Konrad Dybcio wrote:
> >> On 29.12.2023 14:01, Johan Hovold wrote:
> >>> On Wed, Dec 27, 2023 at 11:28:27PM +0100, Konrad Dybcio wrote:
> > 
> >>>> Fix the power-domains assignment to stop potentially toggling the GDSC
> >>>> unnecessarily.
> >>>
> >>> Again, there's no additional toggling being done here, but yes, this may
> >>> keep the domains enabled during suspend depending on how the driver is
> >>> implemented.
> > 
> >> No, it can actually happen. (Some) QMP PHYs are referenced by the
> >> DP hardware. If USB is disabled (or suspended), the DP being active
> >> will hold these GDSCs enabled.
> > 
> > That's not a "toggling", is it? Also if the DP controller is a consumer of
> > these PHY's why should it not prevent the PHYs from suspending?
> 
> As far as I'm concerned, "toggling" is the correct word for "switching it
> on".. 

Hmm, this doesn't make sense. The PHY power domain will be disabled when
the PHY is suspended, regardless of the DP controller. But sure, a
system with USB disabled, would end up with the USB GDSC on.

> While the PHYs are indeed useful for getting displayport to work,
> the USB controller itself may not be necessary there, so enabling its
> power line would be a bit of a waste..

Sure, if the PHYs truly don't need the USB PD then fine, this just
doesn't seem to be case for PCIe, or at least the picture isn't as clear
as your previous commit message suggested.

Johan

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