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Message-Id: <20231231082955.16516-1-guoren@kernel.org>
Date: Sun, 31 Dec 2023 03:29:50 -0500
From: guoren@...nel.org
To: paul.walmsley@...ive.com,
	palmer@...belt.com,
	guoren@...nel.org,
	panqinglin2020@...as.ac.cn,
	bjorn@...osinc.com,
	conor.dooley@...rochip.com,
	leobras@...hat.com,
	peterz@...radead.org,
	keescook@...omium.org,
	wuwei2016@...as.ac.cn,
	xiaoguang.xing@...hgo.com,
	chao.wei@...hgo.com,
	unicorn_wang@...look.com,
	uwu@...nowy.me,
	jszhang@...nel.org,
	wefu@...hat.com,
	atishp@...shpatra.org,
	ajones@...tanamicro.com
Cc: linux-riscv@...ts.infradead.org,
	linux-kernel@...r.kernel.org,
	Guo Ren <guoren@...ux.alibaba.com>
Subject: [PATCH V2 0/3] riscv: Add Zicbop & prefetchw support

From: Guo Ren <guoren@...ux.alibaba.com>

This patch series adds Zicbop support and then enables the Linux
prefetchw feature. It's based on v6.7-rc7.

PATCH[1] - Add Zicbop support
PATCH[2] - Add prefetchw support
PATCH[3] - Enhance xchg_small

Changelog:
V2:
 - Separate from the qspinlock series
 - Optimize coding convention with last review advice
 - Add DEFINE_INSN_S type in insn-def.h
 - Add CBO_PREFETCH_I/R/W

V1:
https://lore.kernel.org/linux-riscv/20230910082911.3378782-4-guoren@kernel.org/

Guo Ren (3):
  riscv: Add Zicbop instruction definitions & cpufeature
  riscv: Add ARCH_HAS_PRETCHW support with Zibop
  riscv: xchg: Prefetch the destination word for sc.w

 arch/riscv/Kconfig                 | 15 ++++++++
 arch/riscv/include/asm/cmpxchg.h   |  4 +-
 arch/riscv/include/asm/hwcap.h     |  1 +
 arch/riscv/include/asm/insn-def.h  | 60 ++++++++++++++++++++++++++++++
 arch/riscv/include/asm/processor.h | 16 ++++++++
 arch/riscv/kernel/cpufeature.c     |  1 +
 6 files changed, 96 insertions(+), 1 deletion(-)

-- 
2.40.1


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