linux-kernel - [PATCH v2 0/3] perf/x86/amd: Miscellaneous fixes

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Message-ID: <cover.1704103399.git.sandipan.das@amd.com>
Date: Tue, 2 Jan 2024 11:31:27 +0530
From: Sandipan Das <sandipan.das@....com>
To: <linux-perf-users@...r.kernel.org>, <linux-kernel@...r.kernel.org>
CC: <x86@...nel.org>, <peterz@...radead.org>, <mingo@...hat.com>,
	<acme@...nel.org>, <mark.rutland@....com>,
	<alexander.shishkin@...ux.intel.com>, <jolsa@...nel.org>,
	<namhyung@...nel.org>, <adrian.hunter@...el.com>, <tglx@...utronix.de>,
	<bp@...en8.de>, <eranian@...gle.com>, <irogers@...gle.com>,
	<mario.limonciello@....com>, <ravi.bangoria@....com>,
	<ananth.narayan@....com>, <sandipan.das@....com>
Subject: [PATCH v2 0/3] perf/x86/amd: Miscellaneous fixes

Contains fixes w.r.t usage of LBR Freeze, Erratum 1452 and a bug in the
CPU offline path where PMU-related registers are reset.

Previous versions can be found at:
v1: https://lore.kernel.org/all/cover.1702833179.git.sandipan.das@amd.com/

Changes in v2:
 - Make the LBR and PMC Freeze feature bit visible in /proc/cpuinfo. As
   suggested by Stephane, this will be useful to determine if it is
   feasible to perform kernel FDO on a system.

Sandipan Das (3):
  perf/x86/amd/lbr: Use freeze based on availability
  perf/x86/amd/lbr: Discard erroneous branch entries
  perf/x86/amd/core: Avoid register reset when CPU is dead

 arch/x86/events/amd/core.c         |  5 ++---
 arch/x86/events/amd/lbr.c          | 22 ++++++++++++++--------
 arch/x86/include/asm/cpufeatures.h |  2 +-
 arch/x86/kernel/cpu/scattered.c    |  1 +
 4 files changed, 18 insertions(+), 12 deletions(-)

-- 
2.34.1