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Message-ID: <22af410fe1f60e7fc04cafbe03cfc50b36b53ae3.camel@xry111.site>
Date: Tue, 02 Jan 2024 16:09:00 +0800
From: Xi Ruoyao <xry111@...111.site>
To: Huacai Chen <chenhuacai@...nel.org>
Cc: WANG Xuerui <kernel@...0n.name>, Eric Biederman <ebiederm@...ssion.com>,
Kees Cook <keescook@...omium.org>, Tiezhu Yang <yangtiezhu@...ngson.cn>,
Jinyang He <hejinyang@...ngson.cn>, Jiaxun Yang <jiaxun.yang@...goat.com>,
loongarch@...ts.linux.dev, linux-mm@...ck.org,
linux-kernel@...r.kernel.org, stable@...r.kernel.org
Subject: Re: [PATCH] LoongArch: Fix and simplify fcsr initialization on
execve
On Tue, 2024-01-02 at 10:35 +0800, Huacai Chen wrote:
/* snip */
> > The only other architecture setting FCSR in SET_PERSONALITY2 is MIPS.
> > They do this for supporting different FP flavors (NaN encodings etc).
> > which do not exist on LoongArch. I'm not sure how MIPS evades the issue
> > (or maybe it's just buggy too) as I don't have a running MIPS hardware
> > now.
> I think you can use QEMU. :)
I'll investigate it later.
> > So for LoongArch, just remove the current->thread.fpu.fcsr setting from
> > SET_PERSONALITY2 and do it in start_thread, after lose_fpu(0). And we
> > just set it to 0, instead of boot_cpu_data.fpu_csr0 (because we should
> > provide the userspace a consistent configuration, no matter how hardware
> > and firmware behave).
> I still prefer to set fcsr to boot_cpu_data.fpu_csr0, because we will
> add LoongArch32 later, not sure whether something will change.
I just seen fpu_csr0 is initialized to FPU_CSR_RN which is just 0 for
LA64, so my concern about firmware & hardware leaving non-zero FCSR is
not valid. I'll send v2 to keep using boot_cpu_data.fpu_csr0 then.
>
>
--
Xi Ruoyao <xry111@...111.site>
School of Aerospace Science and Technology, Xidian University
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