linux-kernel - MIPS: fcsr31 may be dirty after execve when kernel preempt is enabled (was: Re: [PATCH v2] LoongArch: Fix and simplify fcsr initialization on execve)

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Date: Tue, 02 Jan 2024 18:48:27 +0800
From: Xi Ruoyao <xry111@...111.site>
To: Huacai Chen <chenhuacai@...nel.org>, WANG Xuerui <kernel@...0n.name>, 
	Jiaxun Yang <jiaxun.yang@...goat.com>
Cc: Eric Biederman <ebiederm@...ssion.com>, Kees Cook
 <keescook@...omium.org>,  Tiezhu Yang <yangtiezhu@...ngson.cn>, Jinyang He
 <hejinyang@...ngson.cn>, loongarch@...ts.linux.dev,  linux-mm@...ck.org,
 linux-kernel@...r.kernel.org, stable@...r.kernel.org, 
 linux-mips@...r.kernel.org
Subject: MIPS: fcsr31 may be dirty after execve when kernel preempt is
 enabled (was: Re: [PATCH v2] LoongArch: Fix and simplify fcsr
 initialization on execve)

On Tue, 2024-01-02 at 18:25 +0800, Xi Ruoyao wrote:
> On Tue, 2024-01-02 at 18:17 +0800, Xi Ruoyao wrote:
> > The only other architecture setting FCSR in SET_PERSONALITY2 is MIPS.
> > They do this for supporting different FP flavors (NaN encodings etc).
> > which do not exist on LoongArch.  I'm not sure how MIPS evades the issue
> > (or maybe it's just buggy too) but I'll investigate it later.
> 
> Phew.  I just managed to recommission my 3A4000 and I can reproduce the
> issue as well with Linux 5.18.1 (the latest kernel release when I
> decommissioned it) and CONFIG_PREEMPT=y.
> 
> % cat measure.c
> #include <fenv.h>
> int main() { return fetestexcept(FE_INEXACT); }
> 
> % echo $((1./3))
> 0.33333333333333331
> 
> % while ./a.out; do ; done
> (stopped in seconds)
> 
> I'm building the mainline kernel on the 3A4000 now, will see if the
> issue still exists...

Still happening with 6.7.0-rc8.  I'm not sure how to fix it for MIPS. 
Maybe lose_fpu in SET_PERSONALITY2? But to me doing so will be really
nasty.  Anyway I'll leave this for MIPS maintainers.

-- 
Xi Ruoyao <xry111@...111.site>
School of Aerospace Science and Technology, Xidian University