linux-kernel - Re: [PATCH v3 4/4] arm64: dts: rockchip: Add devicetree for Pine64 PineTab2

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Date: Tue, 2 Jan 2024 21:56:20 +0100
From: Jonas Karlman <jonas@...boo.se>
To: "Ondřej Jirman" <megi@....cz>, Manuel Traut
 <manut@...ka.net>, Neil Armstrong <neil.armstrong@...aro.org>, Jessica
 Zhang <quic_jesszhan@...cinc.com>, Sam Ravnborg <sam@...nborg.org>,
 Maarten Lankhorst <maarten.lankhorst@...ux.intel.com>, Maxime Ripard
 <mripard@...nel.org>, Thomas Zimmermann <tzimmermann@...e.de>, David
 Airlie <airlied@...il.com>, Daniel Vetter <daniel@...ll.ch>, Rob Herring
 <robh+dt@...nel.org>, Krzysztof Kozlowski
 <krzysztof.kozlowski+dt@...aro.org>, Conor Dooley <conor+dt@...nel.org>,
 Heiko Stuebner <heiko@...ech.de>, Sandy Huang <hjc@...k-chips.com>, Mark
 Yao <markyao0591@...il.com>, Diederik de Haas <didi.debian@...ow.org>,
 Segfault <awarnecke002@...mail.com>, Arnaud Ferraris
 <aferraris@...ian.org>, Danct12 <danct12@...eup.net>,
 dri-devel@...ts.freedesktop.org, devicetree@...r.kernel.org,
 linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
 linux-rockchip@...ts.infradead.org
Subject: Re: [PATCH v3 4/4] arm64: dts: rockchip: Add devicetree for Pine64
 PineTab2

Hi Manuel and Ondřej,

On 2024-01-02 19:07, Ondřej Jirman wrote:
> Hello Manuel,

[...]

>> +
>> +&sfc {
>> +	pinctrl-names = "default";
>> +	pinctrl-0 = <&fspi_dual_io_pins>;
>> +	status = "okay";
>> +	#address-cells = <1>;
>> +	#size-cells = <0>;
>> +
>> +	flash@0 {
>> +		compatible = "jedec,spi-nor";
>> +		reg = <0>;
>> +		spi-max-frequency = <24000000>;
> 
> That's a bit on the low side. The flash chip should work for all commands up to
> 80MHz https://megous.com/dl/tmp/b428ad9b85ac4633.png and SGM3157YC6 switch
> for the FSPI-CLK should have high enough bandwidth, too.

I agree that this is a little bit on the low side, it was a safe rate
that I used for U-Boot. U-Boot required an exact rate of the supported
sfc clk rates: 24, 50, 75, 100, 125 or 150 MHz.

Please also note that the SPI NOR flash chip used in PineTab2 is not a
GigaDevice GD25LQ128E, it should be a SiliconKaiser SK25LP128, same as
found in the Pine64 PinePhone Pro.

> 
>> +		spi-rx-bus-width = <2>;
> 
> GD25LQ128E supports quad I/O. Maybe try 4 if it will work.

The schematic only shows fspi D0 and D1 connected, and use the D2 line
for eMMC_RSTn, so spi-rx-bus-width = <2> should be correct.

> 
>> +		spi-tx-bus-width = <1>;
>> +	};
>> +};
>> +

Regards,
Jonas