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Message-Id: <20240103031409.2504051-12-dapeng1.mi@linux.intel.com>
Date: Wed, 3 Jan 2024 11:14:09 +0800
From: Dapeng Mi <dapeng1.mi@...ux.intel.com>
To: Sean Christopherson <seanjc@...gle.com>,
Paolo Bonzini <pbonzini@...hat.com>,
Jim Mattson <jmattson@...gle.com>
Cc: kvm@...r.kernel.org,
linux-kernel@...r.kernel.org,
Zhenyu Wang <zhenyuw@...ux.intel.com>,
Zhang Xiong <xiong.y.zhang@...el.com>,
Mingwei Zhang <mizhang@...gle.com>,
Like Xu <like.xu.linux@...il.com>,
Jinrong Liang <cloudliang@...cent.com>,
Dapeng Mi <dapeng1.mi@...el.com>,
Dapeng Mi <dapeng1.mi@...ux.intel.com>
Subject: [kvm-unit-tests Patch v3 11/11] x86: pmu: Improve branch misses event verification
Since IBPB command is already leveraged to force one branch miss
triggering, the lower boundary of branch misses event can be set to 1
instead of 0 on IBPB supported processors. Thus the ambiguity from 0 can
be eliminated.
Signed-off-by: Dapeng Mi <dapeng1.mi@...ux.intel.com>
---
x86/pmu.c | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/x86/pmu.c b/x86/pmu.c
index c8d4a0dcd362..d5c3fcfaa84c 100644
--- a/x86/pmu.c
+++ b/x86/pmu.c
@@ -172,6 +172,16 @@ static void adjust_events_range(struct pmu_event *gp_events, int branch_idx)
gp_events[branch_idx].min = PRECISE_LOOP_BRANCHES;
gp_events[branch_idx].max = PRECISE_LOOP_BRANCHES;
}
+
+ /*
+ * If HW supports IBPB, one branch miss is forced to trigger by
+ * IBPB command. Thus overwrite the lower boundary of branch misses
+ * event to 1.
+ */
+ if (has_ibpb()) {
+ /* branch misses event */
+ gp_events[branch_idx + 1].min = 1;
+ }
}
volatile uint64_t irq_received;
--
2.34.1
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