linux-kernel - Re: [PATCH V3] gpio: pmic-eic-sprd: Configure the bit corresponding to the EIC through offset

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Message-ID: <CAMRc=Md-9vh7-r+SWm-TFPhonntindgj4cjeATUr2uZxEUxLxw@mail.gmail.com>
Date: Wed, 3 Jan 2024 09:51:17 +0100
From: Bartosz Golaszewski <brgl@...ev.pl>
To: Wenhua Lin <Wenhua.Lin@...soc.com>
Cc: Linus Walleij <linus.walleij@...aro.org>, Andy Shevchenko <andy@...nel.org>, 
	Orson Zhai <orsonzhai@...il.com>, Baolin Wang <baolin.wang@...ux.alibaba.com>, 
	Chunyan Zhang <zhang.lyra@...il.com>, linux-gpio@...r.kernel.org, 
	linux-kernel@...r.kernel.org, wenhua lin <wenhua.lin1994@...il.com>, 
	Xiongpeng Wu <xiongpeng.wu@...soc.com>
Subject: Re: [PATCH V3] gpio: pmic-eic-sprd: Configure the bit corresponding
 to the EIC through offset

On Tue, Jan 2, 2024 at 9:28 AM Wenhua Lin <Wenhua.Lin@...soc.com> wrote:
>
> A bank PMIC EIC contains 16 EICs, and the operating registers
> are BIT0-BIT15, such as BIT0 of the register operated by EIC0.
> Using the one-dimensional array reg[CACHE_NR_REGS] for maintenance
> will cause the configuration of other EICs to be affected when
> operating a certain EIC. In order to solve this problem, configure
> the bit corresponding to the EIC through offset.
>
> Signed-off-by: Wenhua Lin <Wenhua.Lin@...soc.com>
> ---
> Change in V3:
> -Change title.
> -Change commit message.
> -Delete the modification of the two-dimensional array maintenance pmic eic,
>  and add the corresponding bits to configure the eic according to the offset.
> ---

Applied, thanks!

Bart