linux-kernel - Re: [PATCH 2/3] arm64: dts: qcom: sc8280xp: camss: Add CCI definitions

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Message-ID: <d8b2867f-7fc6-4147-ae48-11bbf580b5bf@linaro.org>
Date: Wed, 3 Jan 2024 10:47:47 +0100
From: Konrad Dybcio <konrad.dybcio@...aro.org>
To: Bryan O'Donoghue <bryan.odonoghue@...aro.org>,
 Robert Foss <rfoss@...nel.org>, Todor Tomov <todor.too@...il.com>,
 Bjorn Andersson <andersson@...nel.org>,
 Mauro Carvalho Chehab <mchehab@...nel.org>, Rob Herring
 <robh+dt@...nel.org>, Krzysztof Kozlowski
 <krzysztof.kozlowski+dt@...aro.org>, Conor Dooley <conor+dt@...nel.org>
Cc: linux-media@...r.kernel.org, linux-arm-msm@...r.kernel.org,
 devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH 2/3] arm64: dts: qcom: sc8280xp: camss: Add CCI
 definitions

On 3.01.2024 03:18, Bryan O'Donoghue wrote:
> sc8280xp has four Camera Control Interface (CCI) blocks which pinout to
> two I2C master controllers for each CCI.
> 
> The CCI I2C pins are not muxed so we define them in the dtsi.
> 
> Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@...aro.org>
> ---
>  arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 324 +++++++++++++++++++++++++++++++++
>  1 file changed, 324 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
> index febf28356ff8..4f6acd4a3f00 100644
> --- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
> @@ -3451,6 +3451,170 @@ usb_1_role_switch: endpoint {
>  			};
>  		};
>  
> +		cci0: cci@...a000 {
> +			compatible = "qcom,sm8250-cci", "qcom,msm8996-cci";

8280, 8250 instead

> +			#address-cells = <1>;
> +			#size-cells = <0>;
> +
> +			reg = <0 0x0ac4a000 0 0x1000>;
> +			interrupts = <GIC_SPI 460 IRQ_TYPE_EDGE_RISING>;
> +			power-domains = <&camcc TITAN_TOP_GDSC>;
> +
> +			clocks = <&camcc CAMCC_CAMNOC_AXI_CLK>,
> +				 <&camcc CAMCC_SLOW_AHB_CLK_SRC>,
> +				 <&camcc CAMCC_CPAS_AHB_CLK>,
> +				 <&camcc CAMCC_CCI_0_CLK>,
> +				 <&camcc CAMCC_CCI_0_CLK_SRC>;

Is this _src really necessary? (the one above seems to be)

> +			clock-names = "camnoc_axi",
> +				      "slow_ahb_src",
> +				      "cpas_ahb",
> +				      "cci",
> +				      "cci_src";

> +
> +			pinctrl-0 = <&cci0_default>;
> +			pinctrl-1 = <&cci0_sleep>;
> +			pinctrl-names = "default", "sleep";

please refer to Documentation/devicetree/bindings/dts-coding-style.rst

[...]

> +			cci0_default: cci0-default-state {
> +				cci0_i2c0_default: cci0-i2c0-default-pins {
> +					/* cci_i2c_sda0, cci_i2c_scl0 */
> +					pins = "gpio113", "gpio114";
> +					function = "cci_i2c";
> +
> +					bias-pull-up;
> +					drive-strength = <2>; /* 2 mA */

The mA comments seem unnecessary

Also, please follow the style of existing pin nodes:

pins
function
drive-strength
bias-
output-

Konrad