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Message-ID: <CA+Da2qy7Rwkx-SXORi8DB5ptaTm1TuME+CgsCDk2Bs-rJo6gsg@mail.gmail.com>
Date: Wed, 3 Jan 2024 09:40:54 +0800
From: Wenchao Chen <wenchao.chen666@...il.com>
To: Baolin Wang <baolin.wang@...ux.alibaba.com>
Cc: Ulf Hansson <ulf.hansson@...aro.org>, Wenchao Chen <wenchao.chen@...soc.com>,
zhang.lyra@...il.com, orsonzhai@...il.com, linux-mmc@...r.kernel.org,
linux-kernel@...r.kernel.org, zhenxiong.lai@...soc.com,
yuelin.tang@...soc.com
Subject: Re: [PATCH] mmc: sprd: Fix eMMC init failure after hw reset
Gentle ping.
Thanks,
Wenchao.Chen
On Tue, 12 Dec 2023 at 10:57, Baolin Wang <baolin.wang@...ux.alibaba.com> wrote:
>
>
>
> On 12/8/2023 7:52 PM, Wenchao Chen wrote:
> > On Thu, 7 Dec 2023 at 21:59, Ulf Hansson <ulf.hansson@...aro.org> wrote:
> >>
> >> On Mon, 4 Dec 2023 at 07:50, Wenchao Chen <wenchao.chen@...soc.com> wrote:
> >>>
> >>> Some eMMC devices that do not close the auto clk gate
> >>> after hw reset will cause eMMC initialization to fail.
> >>>
> >>> Signed-off-by: Wenchao Chen <wenchao.chen@...soc.com>
> >>
> >> I assume we want this tagged for stable kernels too, but do we have a
> >> corresponding fixes commit that we can point out?
> >>
> >> Kind regards
> >> Uffe
> >>
> >
> > Hi Uffe
> > Sorry, I forgot to add fixes commit.
> >
> > Fixes: ff874dbc4f86 ("mmc: sdhci-sprd: Disable CLK_AUTO when the clock
> > is less than 400K")
>
> With the Fixes tag, looks goo to me.
> Reviewed-by: Baolin Wang <baolin.wang@...ux.alibaba.com>
>
> >>> ---
> >>> drivers/mmc/host/sdhci-sprd.c | 10 +++++++---
> >>> 1 file changed, 7 insertions(+), 3 deletions(-)
> >>>
> >>> diff --git a/drivers/mmc/host/sdhci-sprd.c b/drivers/mmc/host/sdhci-sprd.c
> >>> index 6b8a57e2d20f..bed57a1c64b5 100644
> >>> --- a/drivers/mmc/host/sdhci-sprd.c
> >>> +++ b/drivers/mmc/host/sdhci-sprd.c
> >>> @@ -239,15 +239,19 @@ static inline void _sdhci_sprd_set_clock(struct sdhci_host *host,
> >>> div = ((div & 0x300) >> 2) | ((div & 0xFF) << 8);
> >>> sdhci_enable_clk(host, div);
> >>>
> >>> + val = sdhci_readl(host, SDHCI_SPRD_REG_32_BUSY_POSI);
> >>> + mask = SDHCI_SPRD_BIT_OUTR_CLK_AUTO_EN | SDHCI_SPRD_BIT_INNR_CLK_AUTO_EN;
> >>> /* Enable CLK_AUTO when the clock is greater than 400K. */
> >>> if (clk > 400000) {
> >>> - val = sdhci_readl(host, SDHCI_SPRD_REG_32_BUSY_POSI);
> >>> - mask = SDHCI_SPRD_BIT_OUTR_CLK_AUTO_EN |
> >>> - SDHCI_SPRD_BIT_INNR_CLK_AUTO_EN;
> >>> if (mask != (val & mask)) {
> >>> val |= mask;
> >>> sdhci_writel(host, val, SDHCI_SPRD_REG_32_BUSY_POSI);
> >>> }
> >>> + } else {
> >>> + if (val & mask) {
> >>> + val &= ~mask;
> >>> + sdhci_writel(host, val, SDHCI_SPRD_REG_32_BUSY_POSI);
> >>> + }
> >>> }
> >>> }
> >>>
> >>> --
> >>> 2.17.1
> >>>
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