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Message-ID: <ZZcMycoHUqzBmGFs@boqun-archlinux>
Date: Thu, 4 Jan 2024 11:53:45 -0800
From: Boqun Feng <boqun.feng@...il.com>
To: Leonardo Bras <leobras@...hat.com>
Cc: Will Deacon <will@...nel.org>, Peter Zijlstra <peterz@...radead.org>,
	Mark Rutland <mark.rutland@....com>,
	Paul Walmsley <paul.walmsley@...ive.com>,
	Palmer Dabbelt <palmer@...belt.com>,
	Albert Ou <aou@...s.berkeley.edu>, Guo Ren <guoren@...nel.org>,
	Andrea Parri <parri.andrea@...il.com>,
	Geert Uytterhoeven <geert@...ux-m68k.org>,
	Ingo Molnar <mingo@...nel.org>,
	Andrzej Hajda <andrzej.hajda@...el.com>,
	linux-kernel@...r.kernel.org, linux-riscv@...ts.infradead.org
Subject: Re: [PATCH v1 1/5] riscv/cmpxchg: Deduplicate xchg() asm functions

On Wed, Jan 03, 2024 at 01:31:59PM -0300, Leonardo Bras wrote:
> In this header every xchg define (_relaxed, _acquire, _release, vanilla)
> contain it's own asm file, both for 4-byte variables an 8-byte variables,
> on a total of 8 versions of mostly the same asm.
> 
> This is usually bad, as it means any change may be done in up to 8
> different places.
> 
> Unify those versions by creating a new define with enough parameters to
> generate any version of the previous 8.
> 
> Then unify the result under a more general define, and simplify
> arch_xchg* generation.
> 
> (This did not cause any change in generated asm)
> 
> Signed-off-by: Leonardo Bras <leobras@...hat.com>
> Reviewed-by: Guo Ren <guoren@...nel.org>
> Reviewed-by: Andrea Parri <parri.andrea@...il.com>
> Tested-by: Guo Ren <guoren@...nel.org>
> ---
>  arch/riscv/include/asm/cmpxchg.h | 138 ++++++-------------------------
>  1 file changed, 23 insertions(+), 115 deletions(-)
> 
> diff --git a/arch/riscv/include/asm/cmpxchg.h b/arch/riscv/include/asm/cmpxchg.h
> index 2f4726d3cfcc2..48478a8eecee7 100644
> --- a/arch/riscv/include/asm/cmpxchg.h
> +++ b/arch/riscv/include/asm/cmpxchg.h
> @@ -11,140 +11,48 @@
>  #include <asm/barrier.h>
>  #include <asm/fence.h>
>  
> -#define __xchg_relaxed(ptr, new, size)					\
> +#define __arch_xchg(sfx, prepend, append, r, p, n)			\
>  ({									\
> -	__typeof__(ptr) __ptr = (ptr);					\
> -	__typeof__(new) __new = (new);					\
> -	__typeof__(*(ptr)) __ret;					\
> -	switch (size) {							\
> -	case 4:								\
> -		__asm__ __volatile__ (					\
> -			"	amoswap.w %0, %2, %1\n"			\
> -			: "=r" (__ret), "+A" (*__ptr)			\
> -			: "r" (__new)					\
> -			: "memory");					\

Hmm... actually xchg_relaxed() doesn't need to be a barrier(), so the
"memory" clobber here is not needed here. Of course, it's out of the
scope of this series, but I'm curious to see what would happen if we
remove the "memory" clobber _relaxed() ;-)

Regards,
Boqun

> -		break;							\
> -	case 8:								\
> -		__asm__ __volatile__ (					\
> -			"	amoswap.d %0, %2, %1\n"			\
> -			: "=r" (__ret), "+A" (*__ptr)			\
> -			: "r" (__new)					\
> -			: "memory");					\
> -		break;							\
> -	default:							\
> -		BUILD_BUG();						\
> -	}								\
> -	__ret;								\
> -})
> -
> -#define arch_xchg_relaxed(ptr, x)					\
> -({									\
> -	__typeof__(*(ptr)) _x_ = (x);					\
> -	(__typeof__(*(ptr))) __xchg_relaxed((ptr),			\
> -					    _x_, sizeof(*(ptr)));	\
> +	__asm__ __volatile__ (						\
> +		prepend							\
> +		"	amoswap" sfx " %0, %2, %1\n"			\
> +		append							\
> +		: "=r" (r), "+A" (*(p))					\
> +		: "r" (n)						\
> +		: "memory");						\
>  })
>  
> -#define __xchg_acquire(ptr, new, size)					\
> +#define _arch_xchg(ptr, new, sfx, prepend, append)			\
>  ({									\
>  	__typeof__(ptr) __ptr = (ptr);					\
> -	__typeof__(new) __new = (new);					\
> -	__typeof__(*(ptr)) __ret;					\
> -	switch (size) {							\
> +	__typeof__(*(__ptr)) __new = (new);				\
> +	__typeof__(*(__ptr)) __ret;					\
> +	switch (sizeof(*__ptr)) {					\
>  	case 4:								\
> -		__asm__ __volatile__ (					\
> -			"	amoswap.w %0, %2, %1\n"			\
> -			RISCV_ACQUIRE_BARRIER				\
> -			: "=r" (__ret), "+A" (*__ptr)			\
> -			: "r" (__new)					\
> -			: "memory");					\
> +		__arch_xchg(".w" sfx, prepend, append,			\
> +			      __ret, __ptr, __new);			\
>  		break;							\
>  	case 8:								\
> -		__asm__ __volatile__ (					\
> -			"	amoswap.d %0, %2, %1\n"			\
> -			RISCV_ACQUIRE_BARRIER				\
> -			: "=r" (__ret), "+A" (*__ptr)			\
> -			: "r" (__new)					\
> -			: "memory");					\
> +		__arch_xchg(".d" sfx, prepend, append,			\
> +			      __ret, __ptr, __new);			\
>  		break;							\
>  	default:							\
>  		BUILD_BUG();						\
>  	}								\
> -	__ret;								\
> +	(__typeof__(*(__ptr)))__ret;					\
>  })
>  
> -#define arch_xchg_acquire(ptr, x)					\
> -({									\
> -	__typeof__(*(ptr)) _x_ = (x);					\
> -	(__typeof__(*(ptr))) __xchg_acquire((ptr),			\
> -					    _x_, sizeof(*(ptr)));	\
> -})
> +#define arch_xchg_relaxed(ptr, x)					\
> +	_arch_xchg(ptr, x, "", "", "")
>  
> -#define __xchg_release(ptr, new, size)					\
> -({									\
> -	__typeof__(ptr) __ptr = (ptr);					\
> -	__typeof__(new) __new = (new);					\
> -	__typeof__(*(ptr)) __ret;					\
> -	switch (size) {							\
> -	case 4:								\
> -		__asm__ __volatile__ (					\
> -			RISCV_RELEASE_BARRIER				\
> -			"	amoswap.w %0, %2, %1\n"			\
> -			: "=r" (__ret), "+A" (*__ptr)			\
> -			: "r" (__new)					\
> -			: "memory");					\
> -		break;							\
> -	case 8:								\
> -		__asm__ __volatile__ (					\
> -			RISCV_RELEASE_BARRIER				\
> -			"	amoswap.d %0, %2, %1\n"			\
> -			: "=r" (__ret), "+A" (*__ptr)			\
> -			: "r" (__new)					\
> -			: "memory");					\
> -		break;							\
> -	default:							\
> -		BUILD_BUG();						\
> -	}								\
> -	__ret;								\
> -})
> +#define arch_xchg_acquire(ptr, x)					\
> +	_arch_xchg(ptr, x, "", "", RISCV_ACQUIRE_BARRIER)
>  
>  #define arch_xchg_release(ptr, x)					\
> -({									\
> -	__typeof__(*(ptr)) _x_ = (x);					\
> -	(__typeof__(*(ptr))) __xchg_release((ptr),			\
> -					    _x_, sizeof(*(ptr)));	\
> -})
> -
> -#define __arch_xchg(ptr, new, size)					\
> -({									\
> -	__typeof__(ptr) __ptr = (ptr);					\
> -	__typeof__(new) __new = (new);					\
> -	__typeof__(*(ptr)) __ret;					\
> -	switch (size) {							\
> -	case 4:								\
> -		__asm__ __volatile__ (					\
> -			"	amoswap.w.aqrl %0, %2, %1\n"		\
> -			: "=r" (__ret), "+A" (*__ptr)			\
> -			: "r" (__new)					\
> -			: "memory");					\
> -		break;							\
> -	case 8:								\
> -		__asm__ __volatile__ (					\
> -			"	amoswap.d.aqrl %0, %2, %1\n"		\
> -			: "=r" (__ret), "+A" (*__ptr)			\
> -			: "r" (__new)					\
> -			: "memory");					\
> -		break;							\
> -	default:							\
> -		BUILD_BUG();						\
> -	}								\
> -	__ret;								\
> -})
> +	_arch_xchg(ptr, x, "", RISCV_RELEASE_BARRIER, "")
>  
>  #define arch_xchg(ptr, x)						\
> -({									\
> -	__typeof__(*(ptr)) _x_ = (x);					\
> -	(__typeof__(*(ptr))) __arch_xchg((ptr), _x_, sizeof(*(ptr)));	\
> -})
> +	_arch_xchg(ptr, x, ".aqrl", "", "")
>  
>  #define xchg32(ptr, x)							\
>  ({									\
> -- 
> 2.43.0
> 

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