linux-kernel - RE: [RFC PATCH 0/6] Add Pinctrl driver for Starfive JH8100 SoC

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Message-ID:
 <ZQ0PR01MB1302318322A6534DF8119E81F667A@ZQ0PR01MB1302.CHNPR01.prod.partner.outlook.cn>
Date: Thu, 4 Jan 2024 08:28:10 +0000
From: Yuklin Soo <yuklin.soo@...rfivetech.com>
To: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>, Yuklin Soo
	<yuklin.soo@...rfivetech.com>, Linus Walleij <linus.walleij@...aro.org>,
	Bartosz Golaszewski <bartosz.golaszewski@...aro.org>, Hal Feng
	<hal.feng@...rfivetech.com>, Leyfoon Tan <leyfoon.tan@...rfivetech.com>,
	Jianlong Huang <jianlong.huang@...rfivetech.com>, Emil Renner Berthing
	<kernel@...il.dk>, Rob Herring <robh@...nel.org>, Krzysztof Kozlowski
	<krzysztof.kozlowski+dt@...aro.org>, Conor Dooley <conor+dt@...nel.org>, Drew
 Fustini <drew@...gleboard.org>
CC: "linux-gpio@...r.kernel.org" <linux-gpio@...r.kernel.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
	"linux-riscv@...ts.infradead.org" <linux-riscv@...ts.infradead.org>, Paul
 Walmsley <paul.walmsley@...ive.com>, Palmer Dabbelt <palmer@...belt.com>,
	Albert Ou <aou@...s.berkeley.edu>
Subject: RE: [RFC PATCH 0/6] Add Pinctrl driver for Starfive JH8100 SoC



> -----Original Message-----
> From: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
> Sent: Friday, December 22, 2023 12:20 AM
> To: Yuklin Soo <yuklin.soo@...rfivetech.com>; Linus Walleij
> <linus.walleij@...aro.org>; Bartosz Golaszewski
> <bartosz.golaszewski@...aro.org>; Hal Feng <hal.feng@...rfivetech.com>;
> Leyfoon Tan <leyfoon.tan@...rfivetech.com>; Jianlong Huang
> <jianlong.huang@...rfivetech.com>; Emil Renner Berthing
> <kernel@...il.dk>; Rob Herring <robh@...nel.org>; Krzysztof Kozlowski
> <krzysztof.kozlowski+dt@...aro.org>; Conor Dooley <conor+dt@...nel.org>;
> Drew Fustini <drew@...gleboard.org>
> Cc: linux-gpio@...r.kernel.org; linux-kernel@...r.kernel.org;
> devicetree@...r.kernel.org; linux-riscv@...ts.infradead.org; Paul Walmsley
> <paul.walmsley@...ive.com>; Palmer Dabbelt <palmer@...belt.com>;
> Albert Ou <aou@...s.berkeley.edu>
> Subject: Re: [RFC PATCH 0/6] Add Pinctrl driver for Starfive JH8100 SoC
> 
> On 21/12/2023 09:36, Alex Soo wrote:
> > Starfive JH8100 SoC consists of 4 pinctrl domains - sys_east,
> > sys_west, sys_gmac, and aon. This patch series adds pinctrl drivers
> > for these 4 pinctrl domains and this patch series is depending on the
> > JH8100 base patch series in [1] and [2].
> > The relevant dt-binding documentation for each pinctrl domain has been
> > updated accordingly.
> 
> Please explain why this is RFC. Every patch is RFC, so what is special about
> here? Usually this means work is not finished and should not be merged,
> neither reviewed. If you spelled out here the reasons, it would be easier for
> us to understand whether we should complain about broken and non-
> building code or not.

This JH8100 SoC pinctrl patch is dependent on the following: 
-	Initial device tree support and dt-bindings for JH8100 SoC
https://lore.kernel.org/lkml/20231214-platonic-unhearing-27e2ec3d8f75@spud/
-	Clock & Reset Support for JH8100 SoC
 https://lore.kernel.org/lkml/20231206115000.295825-1-jeeheng.sia@starfivetech.com/
 

Refer to the first link, there is maintainer feedback that if our evaluation platform is FPGA-based (since actual silicon is still unavailable), they are not keen on merging the patches, and things like pinctrl or clock drivers should first be submitted as “not to be merged”, in other words, as RFC patches.

> 
> Best regards,
> Krzysztof