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Message-ID: <724f608a-cbfe-48f6-a1f7-59b961a7d724@quicinc.com>
Date: Thu, 4 Jan 2024 18:13:52 +0800
From: Fenglin Wu <quic_fenglinw@...cinc.com>
To: Dmitry Baryshkov <dmitry.baryshkov@...aro.org>, <quic_tdas@...cinc.com>,
<quic_aiquny@...cinc.com>
CC: <kernel@...cinc.com>, Andy Gross <agross@...nel.org>,
Bjorn Andersson
<andersson@...nel.org>,
Konrad Dybcio <konrad.dybcio@...aro.org>,
Rob Herring
<robh+dt@...nel.org>,
Krzysztof Kozlowski
<krzysztof.kozlowski+dt@...aro.org>,
Conor Dooley <conor+dt@...nel.org>, <linux-arm-msm@...r.kernel.org>,
<devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH] arm64: dts: qcom: ipq6018: add #power-domain-cells for
gcc node
On 1/4/2024 5:53 PM, Dmitry Baryshkov wrote:
> On Thu, 4 Jan 2024 at 10:06, Fenglin Wu via B4 Relay
> <devnull+quic_fenglinw.quicinc.com@...nel.org> wrote:
>>
>> From: Fenglin Wu <quic_fenglinw@...cinc.com>
>>
>> Property '#power-domain-cells' is required as per defined in qcom,gcc.yaml
>> so add it for ipq6018 gcc device node to eliminate following warning in
>> dtbs_check:
>>
>> arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dtb: gcc@...0000:
>> '#power-domain-cells' is a required property
>> from schema $id: http://devicetree.org/schemas/clock/qcom,gcc-ipq6018.yaml#
>
> But ipq6018 doesn't implement GDSC support. So for the sake of fixing
> the warning you are adding a bogus property.
>
I agree. However, there are also some gcc drivers not implementing GDSC
support but the bindings are adding '#power-domain-cells' in the DT
example, such as: qcom,gcc-apq8064.yaml, qcom,gcc-ipq4019.yaml,
qcom,gcc-ipq6018.yaml, qcom,gcc-ipq8064.yaml, qcom,gcc-msm8660.yaml.
Actually I thought that maybe we should do a clean up by removing
'#power-domain-cells' out of the qcom,gcc.yaml binding and only adding
it into individual qcom,gcc-xxx.yaml for the driver which has
implemented GDSC support. I checked this with Taniya offline, but she
prefers only fixing it in ipq6018.dtsi as it doesn't hurt anything by
adding the property, and she expects the GDSC support should be existing
in most of qcom,gcc drivers especially the newer Qcom chipsets.
>>
>> Signed-off-by: Fenglin Wu <quic_fenglinw@...cinc.com>
>> ---
>> arch/arm64/boot/dts/qcom/ipq6018.dtsi | 1 +
>> 1 file changed, 1 insertion(+)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/ipq6018.dtsi b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
>> index 39cd6b76b4c1..54914912d610 100644
>> --- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
>> @@ -386,6 +386,7 @@ gcc: gcc@...0000 {
>> reg = <0x0 0x01800000 0x0 0x80000>;
>> clocks = <&xo>, <&sleep_clk>;
>> clock-names = "xo", "sleep_clk";
>> + #power-domain-cells = <1>;
>> #clock-cells = <1>;
>> #reset-cells = <1>;
>> };
>>
>> ---
>> base-commit: 17cb8a20bde66a520a2ca7aad1063e1ce7382240
>> change-id: 20240103-gcc-docs-update-fa604579e468
>>
>> Best regards,
>> --
>> Fenglin Wu <quic_fenglinw@...cinc.com>
>>
>>
>
>
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