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Message-ID:
<AS1PR05MB93931538EE9A569728EFA724B667A@AS1PR05MB9393.eurprd05.prod.outlook.com>
Date: Thu, 4 Jan 2024 10:31:13 +0000
From: Ben Mesman | Spark Narrowcasting <ben@...rknarrowcasting.nl>
To: "Fred Ai(WH)" <fred.ai@...hubtech.com>, Sean Christopherson
<seanjc@...gle.com>
CC: Thomas Gleixner <tglx@...utronix.de>, Ingo Molnar <mingo@...hat.com>,
Borislav Petkov <bp@...en8.de>, Dave Hansen <dave.hansen@...ux.intel.com>,
"x86@...nel.org" <x86@...nel.org>, "linux-kernel@...r.kernel.org"
<linux-kernel@...r.kernel.org>, Ulf Hansson <ulf.hansson@...aro.org>, Adrian
Hunter <adrian.hunter@...el.com>, "Chevron Li (WH)"
<chevron.li@...hubtech.com>, "Shaper Liu (WH)" <shaper.liu@...hubtech.com>
Subject: Re: Bug: After a 'warm' reboot the disk is missing (not detected by
the bios) on a HP t640
Hi Fred Ai,
> Hi Sean Christopherson
> I am maintainer of module “sdhci-pci-o2micro”. I provide the attachment code to fix this issue, but I didn't test this path code. You can test attachment patch code and give the feedback to me.
> If this issue can be fixed by this patch, I will consider committing the new patch to fix this issue at linux master branch.
I tried the patch, but it didn't solve the issue, sorry.
Do you need any extra info? Any other help I can give to solve this problem?
Thanks,
Ben Mesman.
--
> Diff patch in "linux/drivers/mmc/host/sdhci-pci-o2micro.c" as below:
>
> diff --git a/sdhci-pci-o2micro.c b/sdhci-pci-o2micro.c
> index 620f52a..d520369 100644
> --- a/sdhci-pci-o2micro.c
> +++ b/sdhci-pci-o2micro.c
> @@ -603,6 +603,31 @@ static void sdhci_pci_o2_set_clock(struct sdhci_host *host, unsigned int clock)
> sdhci_o2_enable_clk(host, clk);
> }
>
> +static void sdhci_pci_o2_remove_slot(struct sdhci_pci_slot *slot, int dead)
> +{
> + u8 scratch_8 = 0;
> + u32 reg_val = 0;
> + struct sdhci_pci_chip *chip;
> +
> + chip = slot->chip;
> +
> + /* UnLock WP */
> + pci_read_config_byte(chip->pdev, O2_SD_LOCK_WP, &scratch_8);
> + scratch_8 &= 0x7f;
> + pci_write_config_byte(chip->pdev, O2_SD_LOCK_WP, scratch_8);
> +
> + /* Set pcr 0x354[16] to switch Clock Source back to OPE Clock */
> + pci_read_config_dword(chip->pdev, O2_SD_OUTPUT_CLK_SOURCE_SWITCH, ®_val);
> + reg_val &= ~(O2_SD_SEL_DLL);
> + pci_write_config_dword(chip->pdev, O2_SD_OUTPUT_CLK_SOURCE_SWITCH, reg_val);
> +
> + /* Lock WP */
> + pci_read_config_byte(chip->pdev, O2_SD_LOCK_WP, &scratch_8);
> + scratch_8 |= 0x80;
> + pci_write_config_byte(chip->pdev, O2_SD_LOCK_WP, scratch_8);
> +
> +}
> +
> static int sdhci_pci_o2_probe_slot(struct sdhci_pci_slot *slot)
> {
> struct sdhci_pci_chip *chip;
> @@ -924,4 +949,5 @@ const struct sdhci_pci_fixes sdhci_o2 = {
> #endif
> .ops = &sdhci_pci_o2_ops,
> .priv_size = sizeof(struct o2_host),
> + .remove_slot= sdhci_pci_o2_remove_slot,
> };
>
>
> Thanks
> Fred
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