linux-kernel - Re: [PATCH v4 0/3] irqchip/gic-v3: Enable non-coherent GIC designs probing

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Message-ID: <ZZaeyBXn85AnsIk6@shell.armlinux.org.uk>
Date: Thu, 4 Jan 2024 12:04:24 +0000
From: "Russell King (Oracle)" <linux@...linux.org.uk>
To: Marc Zyngier <maz@...nel.org>
Cc: "Rafael J. Wysocki" <rafael@...nel.org>,
	Lorenzo Pieralisi <lpieralisi@...nel.org>,
	linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
	linux-acpi@...r.kernel.org, acpica-devel@...ts.linux.dev,
	Mark Rutland <mark.rutland@....com>,
	Robin Murphy <robin.murphy@....com>,
	Fang Xiang <fangxiang3@...omi.com>,
	Robert Moore <robert.moore@...el.com>
Subject: Re: [PATCH v4 0/3] irqchip/gic-v3: Enable non-coherent GIC designs
 probing

On Thu, Jan 04, 2024 at 11:34:48AM +0000, Marc Zyngier wrote:
> On Wed, 03 Jan 2024 13:43:16 +0000,
> "Rafael J. Wysocki" <rafael@...nel.org> wrote:
> > 
> > On Wed, Dec 27, 2023 at 12:00 PM Lorenzo Pieralisi
> > <lpieralisi@...nel.org> wrote:
> > >
> > > This series is v4 of previous series:
> > >
> > > v3: https://lore.kernel.org/all/20231006125929.48591-1-lpieralisi@kernel.org
> > > v2: https://lore.kernel.org/all/20230906094139.16032-1-lpieralisi@kernel.org
> > > v1: https://lore.kernel.org/all/20230905104721.52199-1-lpieralisi@kernel.org
> > >
> > > v3 -> v4:
> > >         - Dropped patches [1-3], already merged
> > >         - Added Linuxized ACPICA changes accepted upstream
> > >         - Rebased against v6.7-rc3
> > >
> > > v2 -> v3:
> > >         - Added ACPICA temporary changes and ACPI changes to implement
> > >           ECR https://bugzilla.tianocore.org/show_bug.cgi?id=4557
> > >         - ACPI changes are for testing purposes - subject to ECR code
> > >           first approval
> > >
> > > v1 -> v2:
> > >         - Updated DT bindings as per feedback
> > >         - Updated patch[2] to use GIC quirks infrastructure
> > >
> > > Original cover letter
> > > ---
> > > The GICv3 architecture specifications provide a means for the
> > > system programmer to set the shareability and cacheability
> > > attributes the GIC components (redistributors and ITSes) use
> > > to drive memory transactions.
> > >
> > > Albeit the architecture give control over shareability/cacheability
> > > memory transactions attributes (and barriers), it is allowed to
> > > connect the GIC interconnect ports to non-coherent memory ports
> > > on the interconnect, basically tying off shareability/cacheability
> > > "wires" and de-facto making the redistributors and ITSes non-coherent
> > > memory observers.
> > >
> > > This series aims at starting a discussion over a possible solution
> > > to this problem, by adding to the GIC device tree bindings the
> > > standard dma-noncoherent property. The GIC driver uses the property
> > > to force the redistributors and ITSes shareability attributes to
> > > non-shareable, which consequently forces the driver to use CMOs
> > > on GIC memory tables.
> > >
> > > On ARM DT DMA is default non-coherent, so the GIC driver can't rely
> > > on the generic DT dma-coherent/non-coherent property management layer
> > > (of_dma_is_coherent()) which would default all GIC designs in the field
> > > as non-coherent; it has to rely on ad-hoc dma-noncoherent property handling.
> > >
> > > When a consistent approach is agreed upon for DT an equivalent binding will
> > > be put forward for ACPI based systems.
> > >
> > > Lorenzo Pieralisi (3):
> > >   ACPICA: MADT: Add GICC online capable bit handling
> > >   ACPICA: MADT: Add new MADT GICC/GICR/ITS non-coherent flags handling
> > >   irqchip/gic-v3: Enable non-coherent redistributors/ITSes ACPI probing
> > >
> > >  drivers/acpi/processor_core.c    | 21 +++++++++++++++++++++
> > >  drivers/irqchip/irq-gic-common.h |  8 ++++++++
> > >  drivers/irqchip/irq-gic-v3-its.c |  4 ++++
> > >  drivers/irqchip/irq-gic-v3.c     |  9 +++++++++
> > >  include/acpi/actbl2.h            | 12 ++++++++++--
> > >  include/linux/acpi.h             |  3 +++
> > >  6 files changed, 55 insertions(+), 2 deletions(-)
> > >
> > > --
> > 
> > I can apply the first 2 patches, but I would need an ACK for the 3rd one.
> > 
> > Alternatively, feel free to add
> > 
> > Acked-by: Rafael J. Wysocki <rafael.j.wysocki@...el.com>
> > 
> > to the first 2 patches and route them via ARM64.
> 
> Thanks for that. I have some comments on the third patch, which I'd
> like to see addressed beforehand. This is probably all 6.9 material
> anyway (nobody is affected by this so far).

>From a purely selfish point of view, it would be useful to have the
first patch merged merely to reduce the burden of patches for vcpu
hotplug.

-- 
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