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Message-ID: <20240104133013.2911035-1-sjakhade@cadence.com>
Date: Thu, 4 Jan 2024 14:30:08 +0100
From: Swapnil Jakhade <sjakhade@...ence.com>
To: <vkoul@...nel.org>, <kishon@...nel.org>, <robh+dt@...nel.org>,
<krzysztof.kozlowski+dt@...aro.org>, <conor+dt@...nel.org>,
<linux-phy@...ts.infradead.org>, <linux-kernel@...r.kernel.org>,
<devicetree@...r.kernel.org>
CC: <mparab@...ence.com>, <sjakhade@...ence.com>, <rogerq@...nel.org>,
<s-vadapalli@...com>
Subject: [PATCH v4 0/5] PHY: Add support for dual refclk configurations in Cadence Torrent PHY driver
This patch series extends Torrent PHY driver functionality to support
dual input reference clocks.
It also adds support for following multilink configurations:
- PCIe(100MHz) + USXGMII(156.25MHz)
- USXGMII(156.25MHz) + SGMII/QSGMII(100MHz)
The changes have been validated on TI J721E and J7200 platforms.
v1 of the patch series can be found at [1].
Version History:
v4:
- Fixed error handling in patch 2/5 as per review comments for v3
- Added Acked-by and Reviewed-by tags
v3:
- Updated clock description in DT documentation
- Added Acked-by from Conor
v2:
- Rename refclk1 to pll1_refclk in bindings and in driver
- Simplify clock-names as suggested by Rob
[1] https://lore.kernel.org/linux-phy/20230724150002.5645-1-sjakhade@cadence.com/
Swapnil Jakhade (5):
dt-bindings: phy: cadence-torrent: Add optional input reference clock
for PLL1
phy: cadence-torrent: Add PCIe(100MHz) + USXGMII(156.25MHz) multilink
configuration
phy: cadence-torrent: Add USXGMII(156.25MHz) + SGMII/QSGMII(100MHz)
multilink configuration
dt-bindings: phy: cadence-torrent: Add a separate compatible for TI
J7200
phy: cadence-torrent: Add USXGMII(156.25MHz) + SGMII/QSGMII(100MHz)
multilink config for TI J7200
.../bindings/phy/phy-cadence-torrent.yaml | 11 +-
drivers/phy/cadence/phy-cadence-torrent.c | 720 +++++++++++++++++-
2 files changed, 719 insertions(+), 12 deletions(-)
--
2.25.1
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