linux-kernel - Re: [PATCH RFC V3 4/4] coresight: Have a stab at support for pause / resume

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Message-ID: <ce87308f-1b9b-41b1-8282-04c81d316c58@intel.com>
Date: Fri, 5 Jan 2024 14:56:37 +0200
From: Adrian Hunter <adrian.hunter@...el.com>
To: James Clark <james.clark@....com>
Cc: Ingo Molnar <mingo@...hat.com>, Mark Rutland <mark.rutland@....com>,
 Alexander Shishkin <alexander.shishkin@...ux.intel.com>,
 Heiko Carstens <hca@...ux.ibm.com>, Thomas Richter <tmricht@...ux.ibm.com>,
 Hendrik Brueckner <brueckner@...ux.ibm.com>,
 Suzuki K Poulose <suzuki.poulose@....com>, Mike Leach
 <mike.leach@...aro.org>, coresight@...ts.linaro.org,
 linux-arm-kernel@...ts.infradead.org, Yicong Yang
 <yangyicong@...ilicon.com>, Jonathan Cameron <jonathan.cameron@...wei.com>,
 Will Deacon <will@...nel.org>, Arnaldo Carvalho de Melo <acme@...nel.org>,
 Jiri Olsa <jolsa@...nel.org>, Namhyung Kim <namhyung@...nel.org>,
 Ian Rogers <irogers@...gle.com>, linux-kernel@...r.kernel.org,
 linux-perf-users@...r.kernel.org, Peter Zijlstra <peterz@...radead.org>
Subject: Re: [PATCH RFC V3 4/4] coresight: Have a stab at support for pause /
 resume

On 20/12/23 17:59, James Clark wrote:
> 
> 
> On 15/12/2023 06:42, Adrian Hunter wrote:
>> For discussion only, un-tested...
>>
> 
> If anyone wants to test Coresight, the diff below is required to get the
> most basic use case working. It also probably needs more thought and
> some edge case handling:

Makes sense to me

> 
> diff --git a/drivers/hwtracing/coresight/coresight-etm-perf.c b/drivers/hwtracing/coresight/coresight-etm-perf.c
> index 596c01e37624..bd0767356277 100644
> --- a/drivers/hwtracing/coresight/coresight-etm-perf.c
> +++ b/drivers/hwtracing/coresight/coresight-etm-perf.c
> @@ -556,7 +556,8 @@ static void etm_event_stop(struct perf_event *event, int mode)
>  	struct etm_event_data *event_data;
>  	struct list_head *path;
>  
> -	if (mode & PERF_EF_PAUSE && !READ_ONCE(ctxt->pr_allowed))
> +	if ((mode & PERF_EF_PAUSE && !READ_ONCE(ctxt->pr_allowed)) ||
> +	    event->hw.state == PERF_HES_STOPPED)
>  		return;
>  
>  	WRITE_ONCE(ctxt->pr_allowed, 0);
> @@ -573,9 +574,6 @@ static void etm_event_stop(struct perf_event *event, int mode)
>  	/* Clear the event_data as this ETM is stopping the trace. */
>  	ctxt->event_data = NULL;
>  
> -	if (event->hw.state == PERF_HES_STOPPED)
> -		goto out_pr_allowed;
> -
>  	/* We must have a valid event_data for a running event */
>  	if (WARN_ON(!event_data))
>  		return;
> @@ -586,7 +584,7 @@ static void etm_event_stop(struct perf_event *event, int mode)
>  	 * nothing needs to be torn down other than outputting a
>  	 * zero sized record.
>  	 */
> -	if (handle->event && (mode & PERF_EF_UPDATE) &&
> +	if (handle->event && (mode & (PERF_EF_UPDATE | PERF_EF_PAUSE)) &&
>  	    !cpumask_test_cpu(cpu, &event_data->mask)) {
>  		event->hw.state = PERF_HES_STOPPED;
>  		perf_aux_output_end(handle, 0);
> @@ -616,7 +614,7 @@ static void etm_event_stop(struct perf_event *event, int mode)
>  	 * handle due to lack of buffer space), we don't
>  	 * have to do anything here.
>  	 */
> -	if (handle->event && (mode & PERF_EF_UPDATE)) {
> +	if (handle->event && (mode & (PERF_EF_UPDATE | PERF_EF_PAUSE))) {
>  		if (WARN_ON_ONCE(handle->event != event))
>  			return;
>  
> @@ -646,7 +644,6 @@ static void etm_event_stop(struct perf_event *event, int mode)
>  	/* Disabling the path make its elements available to other sessions */
>  	coresight_disable_path(path);
>  
> -out_pr_allowed:
>  	if (mode & PERF_EF_PAUSE)
>  		WRITE_ONCE(ctxt->pr_allowed, 1);
>  }
> @@ -656,7 +653,7 @@ static int etm_event_add(struct perf_event *event, int mode)
>  	int ret = 0;
>  	struct hw_perf_event *hwc = &event->hw;
>  
> -	if (mode & PERF_EF_START && !READ_ONCE(event->aux_paused)) {
> +	if (mode & PERF_EF_START) {
>  		etm_event_start(event, 0);
>  		if (hwc->state & PERF_HES_STOPPED)
>  			ret = -EINVAL;