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Message-ID: <ZZguvdJTyVgfxm4D@gerhold.net>
Date: Fri, 5 Jan 2024 17:30:53 +0100
From: Stephan Gerhold <stephan@...hold.net>
To: Luca Weiss <luca.weiss@...rphone.com>
Cc: Andy Gross <agross@...nel.org>, Bjorn Andersson <andersson@...nel.org>,
Konrad Dybcio <konrad.dybcio@...aro.org>,
Thara Gopinath <thara.gopinath@...il.com>,
Herbert Xu <herbert@...dor.apana.org.au>,
"David S. Miller" <davem@...emloft.net>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Conor Dooley <conor+dt@...nel.org>,
Bhupesh Sharma <bhupesh.sharma@...aro.org>,
~postmarketos/upstreaming@...ts.sr.ht, phone-devel@...r.kernel.org,
linux-crypto@...r.kernel.org, linux-arm-msm@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH 2/2] arm64: dts: qcom: sm6350: Add Crypto Engine
On Fri, Jan 05, 2024 at 05:15:44PM +0100, Luca Weiss wrote:
> Add crypto engine (CE) and CE BAM related nodes and definitions for this
> SoC.
>
> For reference:
>
> [ 2.297419] qcrypto 1dfa000.crypto: Crypto device found, version 5.5.1
>
> Signed-off-by: Luca Weiss <luca.weiss@...rphone.com>
> ---
> arch/arm64/boot/dts/qcom/sm6350.dtsi | 31 +++++++++++++++++++++++++++++++
> 1 file changed, 31 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/sm6350.dtsi b/arch/arm64/boot/dts/qcom/sm6350.dtsi
> index 8fd6f4d03490..516aadbb16bb 100644
> --- a/arch/arm64/boot/dts/qcom/sm6350.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm6350.dtsi
> @@ -1212,6 +1212,37 @@ ufs_mem_phy_lanes: phy@...7400 {
> };
> };
>
> + cryptobam: dma-controller@...4000 {
> + compatible = "qcom,bam-v1.7.4", "qcom,bam-v1.7.0";
> + reg = <0 0x01dc4000 0 0x24000>;
> + interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>;
> + #dma-cells = <1>;
> + qcom,ee = <0>;
> + qcom,controlled-remotely;
> + num-channels = <16>;
> + qcom,num-ees = <4>;
> + iommus = <&apps_smmu 0x432 0x0000>,
> + <&apps_smmu 0x438 0x0001>,
> + <&apps_smmu 0x43f 0x0000>,
> + <&apps_smmu 0x426 0x0011>,
> + <&apps_smmu 0x436 0x0011>;
The last two lines look equivalent to me: 0x436 & ~0x0011 = 0x426.
It's also a bit weird that the mask has one more digit than the stream
ID. And ordered numerically (by stream ID, first number) it would be a
bit easier to read. :-)
Thanks,
Stephan
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