| lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
|
Open Source and information security mailing list archives
| ||
|
Message-Id: <20240106-fix-a38x-comphy-sd0-gbe0-v1-1-c7fd87272050@solid-run.com>
Date: Sat, 06 Jan 2024 15:56:33 +0100
From: Josua Mayer <josua@...id-run.com>
To: Vinod Koul <vkoul@...nel.org>,
Kishon Vijay Abraham I <kishon@...nel.org>
Cc: rmk@...linux.org.uk, linux-phy@...ts.infradead.org,
linux-kernel@...r.kernel.org, Josua Mayer <josua@...id-run.com>
Subject: [PATCH] phy: armada-38x: add mux value for gbe port 0 on serdes 0
Armada 38x supports 3 functions on serdes #0:
- pcie port 0
- sata port 0
- gbe port 0
Add missing entry for gbe port 0 on serdes 0 to the gbe_mux array.
Because this array looks obscure to new readers, also add a comment
explaining the meaning of rows, columns and values.
Signed-off-by: Josua Mayer <josua@...id-run.com>
---
drivers/phy/marvell/phy-armada38x-comphy.c | 7 ++++++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/drivers/phy/marvell/phy-armada38x-comphy.c b/drivers/phy/marvell/phy-armada38x-comphy.c
index b7d99861526a..d3259984ee8e 100644
--- a/drivers/phy/marvell/phy-armada38x-comphy.c
+++ b/drivers/phy/marvell/phy-armada38x-comphy.c
@@ -47,8 +47,13 @@ struct a38x_comphy {
struct a38x_comphy_lane lane[MAX_A38X_COMPHY];
};
+/*
+ * Map serdes lanes and gbe ports to serdes mux configuration values:
+ * row index = serdes lane,
+ * column index = gbe port number.
+ */
static const u8 gbe_mux[MAX_A38X_COMPHY][MAX_A38X_PORTS] = {
- { 0, 0, 0 },
+ { 3, 0, 0 },
{ 4, 5, 0 },
{ 0, 4, 0 },
{ 0, 0, 4 },
---
base-commit: b85ea95d086471afb4ad062012a4d73cd328fa86
change-id: 20240106-fix-a38x-comphy-sd0-gbe0-02b6861cf973
Sincerely,
--
Josua Mayer <josua@...id-run.com>
Powered by blists - more mailing lists