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Message-ID: <39f9f842-5e40-13af-beff-0078d5a92cce@quicinc.com>
Date: Mon, 8 Jan 2024 11:19:03 -0800
From: Wesley Cheng <quic_wcheng@...cinc.com>
To: Hillf Danton <hdanton@...a.com>
CC: <gregkh@...uxfoundation.org>, <tiwai@...e.com>, <robh+dt@...nel.org>,
<linux-kernel@...r.kernel.org>, <linux-sound@...r.kernel.org>,
<linux-usb@...r.kernel.org>
Subject: Re: [PATCH v12 00/41] Introduce QC USB SND audio offloading support
Hi,
On 1/6/2024 12:54 AM, Hillf Danton wrote:
> On Tue, 2 Jan 2024 13:45:08 -0800 Wesley Cheng <quic_wcheng@...cinc.com>
>> Changes in v2:
>>
>> XHCI:
>> - Replaced XHCI and HCD changes with Mathias' XHCI interrupter changes
>> in his tree:
>> https://git.kernel.org/pub/scm/linux/kernel/git/mnyman/xhci.git/log/?h=feature_interrupters
>>
>> Adjustments made to Mathias' changes:
>> - Created xhci-intr.h to export/expose interrupter APIs versus exposing xhci.h.
>> Moved dependent structures to this file as well. (so clients can parse out
>> information from "struct xhci_interrupter")
>> - Added some basic locking when requesting interrupters.
>> - Fixed up some sanity checks.
>> - Removed clearing of the ERSTBA during freeing of the interrupter. (pending
>> issue where SMMU fault occurs if DMA addr returned is 64b - TODO)
>>
>> - Clean up pending events in the XHCI secondary interrupter. While testing USB
>> bus suspend, it was seen that on bus resume, the xHCI HC would run into a command
>> timeout.
>> - Added offloading APIs to xHCI to fetch transfer and event ring information.
>>
>> ASoC:
>> - Modified soc-usb to allow for multiple USB port additions. For this to work,
>> the USB offload driver has to have a reference to the USB backend by adding
>> a "usb-soc-be" DT entry to the device saved into XHCI sysdev.
>
> Could you tip point to where the usb-soc-be DT entry is added?
>
Intention is that the USB class driver needs to be able to reference the
ASoC DPCM USB backend dai, so the entry has to reside somewhere within
the USB bus. In our case, it would be within the device node which is
saved under the bus->sysdev (XHCI based). Specifically, for a DWC3
based implementation, it would be within the DWC3 node.
Thanks
Wesley Cheng
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