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Message-ID: <20240108135421.684263-6-tmaimon77@gmail.com>
Date: Mon, 8 Jan 2024 15:54:18 +0200
From: Tomer Maimon <tmaimon77@...il.com>
To: <mturquette@...libre.com>, <sboyd@...nel.org>, <robh+dt@...nel.org>,
	<krzysztof.kozlowski+dt@...aro.org>, <tali.perry1@...il.com>,
	<joel@....id.au>, <venture@...gle.com>, <yuenn@...gle.com>,
	<benjaminfair@...gle.com>
CC: <openbmc@...ts.ozlabs.org>, <linux-clk@...r.kernel.org>,
	<linux-kernel@...r.kernel.org>, <devicetree@...r.kernel.org>, Tomer Maimon
	<tmaimon77@...il.com>
Subject: [PATCH v22 5/8] arm64: dts: nuvoton: npcm8xx: add clock reset syscon node

Add clock reset syscon node to handle reset and clock registers
controllers.

Signed-off-by: Tomer Maimon <tmaimon77@...il.com>
---
 arch/arm64/boot/dts/nuvoton/nuvoton-common-npcm8xx.dtsi | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/arch/arm64/boot/dts/nuvoton/nuvoton-common-npcm8xx.dtsi b/arch/arm64/boot/dts/nuvoton/nuvoton-common-npcm8xx.dtsi
index 9c4df91031e7..7d5956e2c9f3 100644
--- a/arch/arm64/boot/dts/nuvoton/nuvoton-common-npcm8xx.dtsi
+++ b/arch/arm64/boot/dts/nuvoton/nuvoton-common-npcm8xx.dtsi
@@ -22,6 +22,11 @@ gcr: system-controller@...00000 {
 			reg = <0x0 0xf0800000 0x0 0x1000>;
 		};
 
+		clk_rst: syscon@...01000 {
+			compatible = "nuvoton,npcm845-clk-rst", "syscon", "simple-mfd";
+			reg = <0x0 0xf0801000 0x0 0xC4>;
+		};
+
 		gic: interrupt-controller@...f9000 {
 			compatible = "arm,gic-400";
 			reg = <0x0 0xdfff9000 0x0 0x1000>,
-- 
2.34.1


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