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Date: Tue, 9 Jan 2024 19:58:20 +0100
From: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
To: Andrew Davis <afd@...com>, Frank Binns <frank.binns@...tec.com>,
 Matt Coster <matt.coster@...tec.com>,
 "H . Nikolaus Schaller" <hns@...delico.com>, Adam Ford <aford173@...il.com>,
 Ivaylo Dimitrov <ivo.g.dimitrov.75@...il.com>,
 Maarten Lankhorst <maarten.lankhorst@...ux.intel.com>,
 Maxime Ripard <mripard@...nel.org>, Thomas Zimmermann <tzimmermann@...e.de>,
 Rob Herring <robh+dt@...nel.org>,
 Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
 Conor Dooley <conor+dt@...nel.org>, Chen-Yu Tsai <wens@...e.org>,
 Jernej Skrabec <jernej.skrabec@...il.com>,
 Samuel Holland <samuel@...lland.org>, BenoƮt Cousson
 <bcousson@...libre.com>, Tony Lindgren <tony@...mide.com>,
 Nishanth Menon <nm@...com>, Vignesh Raghavendra <vigneshr@...com>,
 Tero Kristo <kristo@...nel.org>, Paul Cercueil <paul@...pouillou.net>
Cc: dri-devel@...ts.freedesktop.org, devicetree@...r.kernel.org,
 linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
 linux-sunxi@...ts.linux.dev, linux-omap@...r.kernel.org,
 linux-mips@...r.kernel.org
Subject: Re: [PATCH RFC v2 02/11] dt-bindings: gpu: Add PowerVR Series5 SGX
 GPUs

On 09/01/2024 17:53, Andrew Davis wrote:
> On 1/9/24 5:32 AM, Krzysztof Kozlowski wrote:
>> On 08/01/2024 19:32, Andrew Davis wrote:
>>> The Imagination PowerVR Series5 "SGX" GPU is part of several SoCs from
>>> multiple vendors. Describe how the SGX GPU is integrated in these SoC,
>>> including register space and interrupts. Clocks, reset, and power domain
>>> information is SoC specific.
>>>
>>> Signed-off-by: Andrew Davis <afd@...com>
>>> ---
>>>   .../bindings/gpu/img,powervr-sgx.yaml         | 124 ++++++++++++++++++
>>>   MAINTAINERS                                   |   1 +
>>>   2 files changed, 125 insertions(+)
>>>   create mode 100644 Documentation/devicetree/bindings/gpu/img,powervr-sgx.yaml
>>>
>>> diff --git a/Documentation/devicetree/bindings/gpu/img,powervr-sgx.yaml b/Documentation/devicetree/bindings/gpu/img,powervr-sgx.yaml
>>> new file mode 100644
>>> index 0000000000000..bb821e1184de9
>>> --- /dev/null
>>> +++ b/Documentation/devicetree/bindings/gpu/img,powervr-sgx.yaml
>>> @@ -0,0 +1,124 @@
>>> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
>>> +# Copyright (c) 2023 Imagination Technologies Ltd.
>>
>> Your email has @TI domain, are you sure you attribute your copyrights to
>> Imagination?
>>
> 
> The file started as a copy/paste from a IMG copyrighted file, even
> though it is now almost completely re-written I've left their (c)
> for good measure. I'll add an additional TI (c).
> 
>> ...
>>
>>> +
>>> +  reg:
>>> +    maxItems: 1
>>> +
>>> +  interrupts:
>>> +    maxItems: 1
>>> +
>>> +  clocks: true
>>
>> Missing min/maxItems
>>
> 
> These are set in the allOf/if/then blocks below, seems

I know, but we expect them here.

https://elixir.bootlin.com/linux/v5.19-rc6/source/Documentation/devicetree/bindings/clock/samsung,exynos7-clock.yaml#L57

> if I don't set them to at least something here then I get
> a warning:
> 
>     'clock-names', 'clocks' do not match any of the regexes: 'pinctrl-[0-9]+'
> 
> even if I define them in the allOf block below. I don't
> know what the min/max should be until I check the compatible
> in the allOf block.

As always: the widest constraints.


..

> Logic in YAML always seems messy to me, here it is in pseudo C:
> 
> if (compatible == allwinner,sun6i-a31-gpu ||
>      compatible == ingenic,jz4780-gpu) {
> 	if (compatible == allwinner,sun6i-a31-gpu)
> 		clocks: ...
> 	if (compatible == ingenic,jz4780-gpu)
> 		clocks: ...
> 	required:
> 		- clocks
> 		- clock-names
> } else { /* disallow for all others */
> 	properties:
> 		clocks: false
> 		clock-names: false
> }

OK, I see, that's the limitation of YAML. The point is that this code is
not readable, so just list all fallbacks or variants.



Best regards,
Krzysztof


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