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Message-Id: <20240109202729.54292-1-sigmaris@gmail.com>
Date: Tue, 9 Jan 2024 20:27:28 +0000
From: Hugh Cole-Baker <sigmaris@...il.com>
To: Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Conor Dooley <conor+dt@...nel.org>,
Heiko Stuebner <heiko@...ech.de>
Cc: John Clark <inindev@...il.com>,
Thomas McKahan <tmckahan@...gleboardsolutions.com>,
Hugh Cole-Baker <sigmaris@...il.com>,
devicetree@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org,
linux-rockchip@...ts.infradead.org,
linux-kernel@...r.kernel.org
Subject: [PATCH v2] arm64: dts: rockchip: enable NanoPC-T6 MiniPCIe power
The NanoPC-T6 has a Mini PCIe slot intended to be used for a 4G or LTE
modem. This slot has no PCIe functionality, only USB 2.0 pins are wired
to the SoC, and USIM pins are wired to a SIM card slot on the board.
Define the 3.3v supply for the slot so it can be used.
Signed-off-by: Hugh Cole-Baker <sigmaris@...il.com>
---
Changes from v1:
Renamed pinctrl label to pin_4g_lte_pwren, as labels should start with
alphanumeric characters, and starting with a numeric character is a
syntax error.
v1: https://lore.kernel.org/linux-rockchip/20240107223714.8158-1-sigmaris@gmail.com/
.../boot/dts/rockchip/rk3588-nanopc-t6.dts | 17 +++++++++++++++++
1 file changed, 17 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts b/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts
index d7722772ecd8..7e9613f079fa 100644
--- a/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts
@@ -159,6 +159,18 @@ vcc3v3_pcie30: vcc3v3-pcie30-regulator {
regulator-max-microvolt = <3300000>;
vin-supply = <&vcc5v0_sys>;
};
+
+ vdd_4g_3v3: vdd-4g-3v3-regulator {
+ compatible = "regulator-fixed";
+ enable-active-high;
+ gpio = <&gpio4 RK_PC6 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pin_4g_lte_pwren>;
+ regulator-name = "vdd_4g_3v3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ vin-supply = <&vcc5v0_sys>;
+ };
};
&combphy0_ps {
@@ -504,6 +516,10 @@ pcie_m2_1_pwren: pcie-m21-pwren {
};
usb {
+ pin_4g_lte_pwren: 4g-lte-pwren {
+ rockchip,pins = <4 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
typec5v_pwren: typec5v-pwren {
rockchip,pins = <1 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
};
@@ -884,6 +900,7 @@ &uart2 {
};
&u2phy2_host {
+ phy-supply = <&vdd_4g_3v3>;
status = "okay";
};
--
2.39.3 (Apple Git-145)
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