lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date: Tue, 9 Jan 2024 18:22:13 +0800
From: Xu Yilun <yilun.xu@...ux.intel.com>
To: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
Cc: Michal Simek <michal.simek@....com>, linux-kernel@...r.kernel.org,
	monstr@...str.eu, michal.simek@...inx.com, git@...inx.com,
	Conor Dooley <conor+dt@...nel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
	Moritz Fischer <mdf@...nel.org>, Rob Herring <robh+dt@...nel.org>,
	Tom Rix <trix@...hat.com>, Wu Hao <hao.wu@...el.com>,
	Xu Yilun <yilun.xu@...el.com>,
	"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" <devicetree@...r.kernel.org>,
	kishore Manne <nava.kishore.manne@....com>,
	"open list:FPGA MANAGER FRAMEWORK" <linux-fpga@...r.kernel.org>
Subject: Re: [PATCH 1/2] dt-bindings: fpga: Convert bridge binding to yaml

On Tue, Jan 09, 2024 at 09:16:33AM +0100, Krzysztof Kozlowski wrote:
> On 09/01/2024 09:15, Krzysztof Kozlowski wrote:
> >>>>>>> +properties:
> >>>>>>> +  $nodename:
> >>>>>>> +    pattern: "^fpga-bridge(@.*)?$"
> >>>>>>
> >>>>>> Not sure, but maybe we need to allow fpga-bridge-1? Could we have more
> >>>>>> than one bridge on given system?
> >>>>>
> >>>>> Yilun: Any comment on this?
> >>>>
> >>>> We can have more bridges, but IIUC people use fpga-bridge@0, fpga-bridge@0
> >>>> to identify them. So the expression is OK to me.
> >>>
> >>> So you claim unit address thus reg with some sort of bus address is a
> >>> requirement? Then "?" is not correct in that pattern.
> >>
> >> I expect it is about that people are using fpga-bridge@0 but bridge is not on 
> >> the bus. Yilun said that reg property in altr,socfpga-fpga2sdram-bridge.yaml is 
> >> optional which means no reg property no @XXX in node name.
> >> That's why I think that expression is correct. If there are more bridges without 
> >> reg property then I expect we need to get more examples to align expression.
> > 
> > If we allow node name without unit address, thus not being part of any

This is valid usecase.

> > bus, then the only question is whether it is possible to have system
> > with more than two FPGA bridges. If the answer is "yes", which I think

The answer is yes.

> > is the case, then the pattern should already allow it:
> > 
> > (@[0-9a-f]+|-[0-9]+)?
> 
> Or better go with what I used recently for narrowed choices:
> 
> (@.*|-([0-9]|[1-9][0-9]+))?

It is good to me.

I actually didn't know much about DTS & its Schema, thanks for all your
input.

> 
> Best regards,
> Krzysztof
> 
> 

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ