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Message-ID: <20240109125814.3691033-11-tudor.ambarus@linaro.org>
Date: Tue, 9 Jan 2024 12:58:12 +0000
From: Tudor Ambarus <tudor.ambarus@...aro.org>
To: peter.griffin@...aro.org,
krzysztof.kozlowski+dt@...aro.org,
gregkh@...uxfoundation.org
Cc: mturquette@...libre.com,
sboyd@...nel.org,
robh+dt@...nel.org,
conor+dt@...nel.org,
andi.shyti@...nel.org,
alim.akhtar@...sung.com,
jirislaby@...nel.org,
s.nawrocki@...sung.com,
tomasz.figa@...il.com,
cw00.choi@...sung.com,
linux-arm-kernel@...ts.infradead.org,
linux-samsung-soc@...r.kernel.org,
linux-clk@...r.kernel.org,
devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org,
linux-i2c@...r.kernel.org,
linux-serial@...r.kernel.org,
andre.draszik@...aro.org,
kernel-team@...roid.com,
willmcvicker@...gle.com,
Tudor Ambarus <tudor.ambarus@...aro.org>
Subject: [PATCH v3 10/12] arm64: dts: exynos: gs101: update USI UART to use peric0 clocks
Get rid of the dummy clock and start using the cmu_peric0 clocks
for the usi_uart and serial_0 nodes.
Tested the serial at 115200, 1000000 and 3000000 baudrates,
everthing went fine.
Signed-off-by: Tudor Ambarus <tudor.ambarus@...aro.org>
---
v3: no change
v2: identify and use gate clocks instead of divider clocks
arch/arm64/boot/dts/exynos/google/gs101.dtsi | 14 ++++----------
1 file changed, 4 insertions(+), 10 deletions(-)
diff --git a/arch/arm64/boot/dts/exynos/google/gs101.dtsi b/arch/arm64/boot/dts/exynos/google/gs101.dtsi
index 2d1344a202a9..6aa25cc4676e 100644
--- a/arch/arm64/boot/dts/exynos/google/gs101.dtsi
+++ b/arch/arm64/boot/dts/exynos/google/gs101.dtsi
@@ -180,14 +180,6 @@ HERA_CPU_SLEEP: cpu-hera-sleep {
};
};
- /* TODO replace with CCF clock */
- dummy_clk: clock-3 {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <12345>;
- clock-output-names = "pclk";
- };
-
/* ect node is required to be present by bootloader */
ect {
};
@@ -367,7 +359,8 @@ usi_uart: usi@...000c0 {
ranges;
#address-cells = <1>;
#size-cells = <1>;
- clocks = <&dummy_clk>, <&dummy_clk>;
+ clocks = <&cmu_peric0 CLK_GOUT_PERIC0_CLK_PERIC0_USI0_UART_CLK>,
+ <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP1_IPCLK_0>;
clock-names = "pclk", "ipclk";
samsung,sysreg = <&sysreg_peric0 0x1020>;
samsung,mode = <USI_V2_UART>;
@@ -378,7 +371,8 @@ serial_0: serial@...00000 {
reg = <0x10a00000 0xc0>;
interrupts = <GIC_SPI 634
IRQ_TYPE_LEVEL_HIGH 0>;
- clocks = <&dummy_clk 0>, <&dummy_clk 0>;
+ clocks = <&cmu_peric0 CLK_GOUT_PERIC0_CLK_PERIC0_USI0_UART_CLK>,
+ <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP1_IPCLK_0>;
clock-names = "uart", "clk_uart_baud0";
samsung,uart-fifosize = <256>;
status = "disabled";
--
2.43.0.472.g3155946c3a-goog
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