linux-kernel - Re: [PATCH V3 0/7] Clean up perf mem

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <1417fcb1-4d16-481b-b043-acf022de07fd@linux.intel.com>
Date: Tue, 9 Jan 2024 09:01:46 -0500
From: "Liang, Kan" <kan.liang@...ux.intel.com>
To: Leo Yan <leo.yan@...aro.org>
Cc: acme@...nel.org, irogers@...gle.com, peterz@...radead.org,
 mingo@...hat.com, namhyung@...nel.org, jolsa@...nel.org,
 adrian.hunter@...el.com, john.g.garry@...cle.com, will@...nel.org,
 james.clark@....com, mike.leach@...aro.org, yuhaixin.yhx@...ux.alibaba.com,
 renyu.zj@...ux.alibaba.com, tmricht@...ux.ibm.com, ravi.bangoria@....com,
 atrajeev@...ux.vnet.ibm.com, linux-kernel@...r.kernel.org,
 linux-perf-users@...r.kernel.org, linux-arm-kernel@...ts.infradead.org
Subject: Re: [PATCH V3 0/7] Clean up perf mem



On 2024-01-06 11:08 p.m., Leo Yan wrote:
> On Wed, Dec 13, 2023 at 11:51:47AM -0800, kan.liang@...ux.intel.com wrote:
> 
> [...]
> 
>> Introduce generic functions perf_mem_events__ptr(),
>> perf_mem_events__name() ,and is_mem_loads_aux_event() to replace the
>> ARCH specific ones.
>> Simplify the perf_mem_event__supported().
>>
>> Only keeps the ARCH-specific perf_mem_events array in the corresponding
>> mem-events.c for each ARCH.
>>
>> There is no functional change.
>>
>> The patch set touches almost all the ARCHs, Intel, AMD, ARM, Power and
>> etc. But I can only test it on two Intel platforms.
>> Please give it try, if you have machines with other ARCHs.
>>
>> Here are the test results:
>> Intel hybrid machine:
>>
>> $perf mem record -e list
>> ldlat-loads  : available
>> ldlat-stores : available
>>
>> $perf mem record -e ldlat-loads -v --ldlat 50
>> calling: record -e cpu_atom/mem-loads,ldlat=50/P -e cpu_core/mem-loads,ldlat=50/P
>>
>> $perf mem record -v
>> calling: record -e cpu_atom/mem-loads,ldlat=30/P -e cpu_atom/mem-stores/P -e cpu_core/mem-loads,ldlat=30/P -e cpu_core/mem-stores/P
>>
>> $perf mem record -t store -v
>> calling: record -e cpu_atom/mem-stores/P -e cpu_core/mem-stores/P
>>
>>
>> Intel SPR:
>> $perf mem record -e list
>> ldlat-loads  : available
>> ldlat-stores : available
>>
>> $perf mem record -e ldlat-loads -v --ldlat 50
>> calling: record -e {cpu/mem-loads-aux/,cpu/mem-loads,ldlat=50/}:P
>>
>> $perf mem record -v
>> calling: record -e {cpu/mem-loads-aux/,cpu/mem-loads,ldlat=30/}:P -e cpu/mem-stores/P
>>
>> $perf mem record -t store -v
>> calling: record -e cpu/mem-stores/P
> 
> After applying this series, below tests pass with Arm SPE:
> 
> # ./perf c2c record -- /home/leoy/false_sharing.exe 2
> # ./perf c2c report
> 
> # ./perf mem record -e list
> # ./perf mem record -e spe-load -v --ldlat 50
> # ./perf mem record -v
> # ./perf mem report
> # ./perf mem record -t store -v
> # ./perf mem report
> 
> Tested-by: Leo Yan <leo.yan@...aro.org>
>

Thanks Leo.

Kan