lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <20240110225620.GA2854345-robh@kernel.org>
Date: Wed, 10 Jan 2024 16:56:20 -0600
From: Rob Herring <robh@...nel.org>
To: David Lechner <dlechner@...libre.com>
Cc: Mark Brown <broonie@...nel.org>, Jonathan Cameron <jic23@...nel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>, Conor Dooley <conor+dt@...nel.org>, Michael Hennerich <michael.hennerich@...log.com>, Nuno Sá <nuno.sa@...log.com>, Frank Rowand <frowand.list@...il.com>, Thierry Reding <thierry.reding@...il.com>, Uwe Kleine-König <u.kleine-koenig@...gutronix.de>, Jonathan Corbet <corbet@....net>, linux-spi@...r.kernel.org, linux-iio@...r.kernel.org, devicetree@...r.kernel.org, linux-doc@...r.kernel.org, linux-pwm@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH 11/13] dt-bindings: iio: offload: add binding for PWM/DMA
 triggered buffer

On Wed, Jan 10, 2024 at 01:49:52PM -0600, David Lechner wrote:
> This adds a new binding for a PWM trigger and DMA data output connected
> to an SPI controller offload instance.
> 
> Signed-off-by: David Lechner <dlechner@...libre.com>
> ---
>  .../adi,spi-offload-pwm-trigger-dma-buffer.yaml    | 59 ++++++++++++++++++++++
>  1 file changed, 59 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/iio/offload/adi,spi-offload-pwm-trigger-dma-buffer.yaml b/Documentation/devicetree/bindings/iio/offload/adi,spi-offload-pwm-trigger-dma-buffer.yaml
> new file mode 100644
> index 000000000000..748cfab19eff
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/iio/offload/adi,spi-offload-pwm-trigger-dma-buffer.yaml
> @@ -0,0 +1,59 @@
> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/iio/offload/adi,spi-offload-pwm-trigger-dma-buffer.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: SPI Offload with PWM Trigger and DMA Buffer Data Output
> +
> +maintainers:
> +  - Michael Hennerich <Michael.Hennerich@...log.com>
> +  - Nuno Sá <nuno.sa@...log.com>
> +
> +description: |
> +  This binding describes the connection of a PWM device to the trigger input
> +  and a DMA channel to the output data stream of a SPI Offload instance.
> +
> +  https://wiki.analog.com/resources/fpga/peripherals/spi_engine/offload
> +  https://wiki.analog.com/resources/fpga/peripherals/spi_engine/tutorial
> +
> +$ref: /schemas/spi/adi,axi-spi-engine.yaml#/$defs/offload

Not really worth the complexity just for 'reg'. Generally, the bus 
schema would define general constraints on reg like range of address 
values and the device schema (this one) is just how many entries.

> +
> +properties:
> +  compatible:
> +    const: adi,spi-offload-pwm-trigger-dma-buffer
> +
> +  reg:
> +    maxItems: 1
> +
> +  pwms:
> +    maxItems: 1
> +
> +  dmas:
> +    maxItems: 1
> +
> +required:
> +  - compatible
> +  - pwms
> +  - dmas
> +
> +unevaluatedProperties: false
> +
> +examples:
> +  - |
> +    spi {
> +        #address-cells = <1>;
> +        #size-cells = <0>;
> +
> +        offloads {
> +            #address-cells = <1>;
> +            #size-cells = <0>;
> +
> +            offload@0 {
> +                compatible = "adi,spi-offload-pwm-trigger-dma-buffer";
> +                reg = <0>;
> +                pwms = <&pwm 0>;
> +                dmas = <&dma 0>;
> +            };
> +        };

Just make one complete example for the device.

> +    };
> 
> -- 
> 2.43.0
> 

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ