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Message-ID: <20240110073917.2398826-12-peterlin@andestech.com>
Date: Wed, 10 Jan 2024 15:39:12 +0800
From: Yu Chien Peter Lin <peterlin@...estech.com>
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Subject: [PATCH v7 11/16] riscv: dts: allwinner: Add T-Head PMU extension for sun20i-d1s
xtheadpmu stands for T-Head Performance Monitor Unit extension.
Based on the added T-Head PMU ISA string, the SBI PMU driver
will make use of the non-standard irq source.
Signed-off-by: Yu Chien Peter Lin <peterlin@...estech.com>
Reviewed-by: Guo Ren <guoren@...nel.org>
---
Changes v2 -> v3:
- New patch
Changes v3 -> v4:
- No change
Changes v4 -> v5:
- Include Guo's Reviewed-by
Changes v5 -> v6:
- No change
Changes v6 -> v7:
- No change
---
arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi b/arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi
index 64c3c2e6cbe0..7dcba86cfdd0 100644
--- a/arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi
+++ b/arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi
@@ -27,7 +27,7 @@ cpu0: cpu@0 {
riscv,isa = "rv64imafdc";
riscv,isa-base = "rv64i";
riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "zicntr", "zicsr",
- "zifencei", "zihpm";
+ "zifencei", "zihpm", "xtheadpmu";
#cooling-cells = <2>;
cpu0_intc: interrupt-controller {
--
2.34.1
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