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Date: Wed, 10 Jan 2024 15:39:03 +0800
From: Yu Chien Peter Lin <peterlin@...estech.com>
To: <acme@...nel.org>, <adrian.hunter@...el.com>, <ajones@...tanamicro.com>,
        <alexander.shishkin@...ux.intel.com>, <andre.przywara@....com>,
        <anup@...infault.org>, <aou@...s.berkeley.edu>,
        <atishp@...shpatra.org>, <conor+dt@...nel.org>,
        <conor.dooley@...rochip.com>, <conor@...nel.org>,
        <devicetree@...r.kernel.org>, <dminus@...estech.com>,
        <evan@...osinc.com>, <geert+renesas@...der.be>, <guoren@...nel.org>,
        <heiko@...ech.de>, <irogers@...gle.com>, <jernej.skrabec@...il.com>,
        <jolsa@...nel.org>, <jszhang@...nel.org>,
        <krzysztof.kozlowski+dt@...aro.org>,
        <linux-arm-kernel@...ts.infradead.org>, <linux-kernel@...r.kernel.org>,
        <linux-perf-users@...r.kernel.org>,
        <linux-renesas-soc@...r.kernel.org>, <linux-riscv@...ts.infradead.org>,
        <linux-sunxi@...ts.linux.dev>, <locus84@...estech.com>,
        <magnus.damm@...il.com>, <mark.rutland@....com>, <mingo@...hat.com>,
        <n.shubin@...ro.com>, <namhyung@...nel.org>, <palmer@...belt.com>,
        <paul.walmsley@...ive.com>, <peterlin@...estech.com>,
        <peterz@...radead.org>, <prabhakar.mahadev-lad.rj@...renesas.com>,
        <rdunlap@...radead.org>, <robh+dt@...nel.org>, <samuel@...lland.org>,
        <sunilvl@...tanamicro.com>, <tglx@...utronix.de>,
        <tim609@...estech.com>, <uwu@...nowy.me>, <wens@...e.org>,
        <will@...nel.org>, <ycliang@...estech.com>, <inochiama@...look.com>,
        <chao.wei@...hgo.com>, <unicorn_wang@...look.com>, <wefu@...hat.com>
CC: Randolph <randolph@...estech.com>
Subject: [PATCH v7 02/16] irqchip/riscv-intc: Allow large non-standard interrupt number

Currently, the implementation of the RISC-V INTC driver uses the
interrupt cause as the hardware interrupt number, with a maximum of
64 interrupts. However, the platform can expand the interrupt number
further for custom local interrupts.

To fully utilize the available local interrupt sources, switch
to using irq_domain_create_tree() that creates the radix tree
map, add global variables (riscv_intc_nr_irqs, riscv_intc_custom_base
and riscv_intc_custom_nr_irqs) to determine the valid range of local
interrupt number (hwirq).

Signed-off-by: Yu Chien Peter Lin <peterlin@...estech.com>
Reviewed-by: Randolph <randolph@...estech.com>
---
Changes v1 -> v2:
  - Fixed irq mapping failure checking (suggested by Clément and Anup)
Changes v2 -> v3:
  - No change
Changes v3 -> v4: (Suggested by Thomas [1])
  - Use pr_warn_ratelimited instead
  - Fix coding style and commit message
Changes v4 -> v5: (Suggested by Thomas)
  - Fix commit message
Changes v5 -> v6: (Suggested by Anup [2])
  - Add riscv_intc_* global variables for checking range in riscv_intc_domain_alloc()
  - Advertise the number of interrupts allowed
Changes v6 -> v7:
  - No functional change

[1] https://patchwork.kernel.org/project/linux-riscv/patch/20231023004100.2663486-3-peterlin@andestech.com/#25573085
[2] https://patchwork.kernel.org/project/linux-riscv/patch/20231213070301.1684751-3-peterlin@andestech.com/#25636589
---
 drivers/irqchip/irq-riscv-intc.c | 30 +++++++++++++++++++++++-------
 1 file changed, 23 insertions(+), 7 deletions(-)

diff --git a/drivers/irqchip/irq-riscv-intc.c b/drivers/irqchip/irq-riscv-intc.c
index e8d01b14ccdd..b13a16b164c9 100644
--- a/drivers/irqchip/irq-riscv-intc.c
+++ b/drivers/irqchip/irq-riscv-intc.c
@@ -19,15 +19,17 @@
 #include <linux/smp.h>
 
 static struct irq_domain *intc_domain;
+static unsigned int riscv_intc_nr_irqs __ro_after_init;
+static unsigned int riscv_intc_custom_base __ro_after_init;
+static unsigned int riscv_intc_custom_nr_irqs __ro_after_init;
 
 static asmlinkage void riscv_intc_irq(struct pt_regs *regs)
 {
 	unsigned long cause = regs->cause & ~CAUSE_IRQ_FLAG;
 
-	if (unlikely(cause >= BITS_PER_LONG))
-		panic("unexpected interrupt cause");
-
-	generic_handle_domain_irq(intc_domain, cause);
+	if (generic_handle_domain_irq(intc_domain, cause))
+		pr_warn_ratelimited("Failed to handle interrupt (cause: %ld)\n",
+				    cause);
 }
 
 /*
@@ -93,6 +95,14 @@ static int riscv_intc_domain_alloc(struct irq_domain *domain,
 	if (ret)
 		return ret;
 
+	/*
+	 * Only allow hwirq for which we have corresponding standard or
+	 * custom interrupt enable register.
+	 */
+	if ((riscv_intc_nr_irqs <= hwirq && hwirq < riscv_intc_custom_base) ||
+	    (riscv_intc_custom_base + riscv_intc_custom_nr_irqs) <= hwirq)
+		return -EINVAL;
+
 	for (i = 0; i < nr_irqs; i++) {
 		ret = riscv_intc_domain_map(domain, virq + i, hwirq + i);
 		if (ret)
@@ -117,8 +127,7 @@ static int __init riscv_intc_init_common(struct fwnode_handle *fn)
 {
 	int rc;
 
-	intc_domain = irq_domain_create_linear(fn, BITS_PER_LONG,
-					       &riscv_intc_domain_ops, NULL);
+	intc_domain = irq_domain_create_tree(fn, &riscv_intc_domain_ops, NULL);
 	if (!intc_domain) {
 		pr_err("unable to add IRQ domain\n");
 		return -ENXIO;
@@ -132,7 +141,10 @@ static int __init riscv_intc_init_common(struct fwnode_handle *fn)
 
 	riscv_set_intc_hwnode_fn(riscv_intc_hwnode);
 
-	pr_info("%d local interrupts mapped\n", BITS_PER_LONG);
+	pr_info("%d local interrupts mapped\n", riscv_intc_nr_irqs);
+	if (riscv_intc_custom_nr_irqs)
+		pr_info("%d custom local interrupts mapped\n",
+			riscv_intc_custom_nr_irqs);
 
 	return 0;
 }
@@ -166,6 +178,10 @@ static int __init riscv_intc_init(struct device_node *node,
 		return 0;
 	}
 
+	riscv_intc_nr_irqs = BITS_PER_LONG;
+	riscv_intc_custom_base = riscv_intc_nr_irqs;
+	riscv_intc_custom_nr_irqs = 0;
+
 	return riscv_intc_init_common(of_node_to_fwnode(node));
 }
 
-- 
2.34.1


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