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Date: Wed, 10 Jan 2024 14:13:13 +0000
From: Conor Dooley <conor@...nel.org>
To: Chen Wang <unicornxw@...il.com>
Cc: aou@...s.berkeley.edu, chao.wei@...hgo.com,
	krzysztof.kozlowski+dt@...aro.org, mturquette@...libre.com,
	palmer@...belt.com, paul.walmsley@...ive.com,
	richardcochran@...il.com, robh+dt@...nel.org, sboyd@...nel.org,
	devicetree@...r.kernel.org, linux-clk@...r.kernel.org,
	linux-kernel@...r.kernel.org, linux-riscv@...ts.infradead.org,
	haijiao.liu@...hgo.com, xiaoguang.xing@...hgo.com,
	guoren@...nel.org, jszhang@...nel.org, inochiama@...look.com,
	samuel.holland@...ive.com, Chen Wang <unicorn_wang@...look.com>
Subject: Re: [PATCH v7 4/4] riscv: dts: add clock generator for Sophgo SG2042
 SoC

On Mon, Jan 08, 2024 at 02:49:53PM +0800, Chen Wang wrote:

> +	cgi: oscillator {
> +		compatible = "fixed-clock";
> +		clock-output-names = "cgi";
> +		#clock-cells = <0>;
> +	};

Where does the name "cgi" come from and what does it mean?
Clock Generator Input? Does the sg2042 documentation call it that?

Cheers,
Conor.

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