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Message-ID: <2ce8a48346de7561df12adeedf8060d7578b6146.camel@intel.com>
Date: Thu, 11 Jan 2024 01:52:03 +0000
From: "Zhang, Rui" <rui.zhang@...el.com>
To: "tglx@...utronix.de" <tglx@...utronix.de>, "linux-kernel@...r.kernel.org"
	<linux-kernel@...r.kernel.org>
CC: "jgross@...e.com" <jgross@...e.com>, "x86@...nel.org" <x86@...nel.org>,
	"arjan@...ux.intel.com" <arjan@...ux.intel.com>, "kprateek.nayak@....com"
	<kprateek.nayak@....com>, "Tang, Feng" <feng.tang@...el.com>,
	"kan.liang@...ux.intel.com" <kan.liang@...ux.intel.com>,
	"thomas.lendacky@....com" <thomas.lendacky@....com>, "ray.huang@....com"
	<ray.huang@....com>, "andrew.cooper3@...rix.com" <andrew.cooper3@...rix.com>,
	"Sivanich, Dimitri" <dimitri.sivanich@....com>, "paulmck@...nel.org"
	<paulmck@...nel.org>, "Mehta, Sohil" <sohil.mehta@...el.com>,
	"andy@...radead.org" <andy@...radead.org>
Subject: Re: [patch 37/53] x86/cpu: Detect real BSP on crash kernels

On Wed, 2024-01-10 at 16:14 +0100, Thomas Gleixner wrote:
> On Wed, Jan 10 2024 at 15:19, Thomas Gleixner wrote:
> > > This is the order in MADT,
> > > $ cat apic.dsl  | grep x2Apic
> > > [030h 0048   4]          Processor x2Apic ID : 00000010
> > > [040h 0064   4]          Processor x2Apic ID : 00000011
> ...
> > > and this is the order in Linux (from CPU0 to CPUN)
> > >       x2APIC ID of logical processor = 0x20 (32)
> > >       x2APIC ID of logical processor = 0x10 (16)
> > 
> > What a mess...
> 
> And clearly not according to the spec
> 
>   "The second is that platform firmware should list the boot
> processor
>    as the first processor entry in the MADT."
> 
> Oh well. There are reasons why this is written the way it is.

Let me sync internally to see why it is designed in this way.

thanks,
rui

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