lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <c98a234d-3c4a-43bd-b26b-52cd72588cc7@linaro.org>
Date: Thu, 11 Jan 2024 11:46:14 +0000
From: Bryan O'Donoghue <bryan.odonoghue@...aro.org>
To: Konrad Dybcio <konrad.dybcio@...aro.org>, Robert Foss <rfoss@...nel.org>,
 Todor Tomov <todor.too@...il.com>, Bjorn Andersson <andersson@...nel.org>,
 Mauro Carvalho Chehab <mchehab@...nel.org>, Rob Herring
 <robh+dt@...nel.org>, Krzysztof Kozlowski
 <krzysztof.kozlowski+dt@...aro.org>, Conor Dooley <conor+dt@...nel.org>
Cc: linux-media@...r.kernel.org, linux-arm-msm@...r.kernel.org,
 devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v3 3/4] arm64: dts: qcom: sc8280xp: camss: Add CCI
 definitions

On 10/01/2024 11:03, Konrad Dybcio wrote:
> 
> 
> On 1/9/24 17:06, Bryan O'Donoghue wrote:
>> sc8280xp has four Camera Control Interface (CCI) blocks which pinout to
>> two I2C master controllers for each CCI.
>>
>> The CCI I2C pins are not muxed so we define them in the dtsi.
>>
>> Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@...aro.org>
>> ---
>>   arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 307 
>> +++++++++++++++++++++++++++++++++
>>   1 file changed, 307 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi 
>> b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
>> index febf28356ff8..f48dfa5e5f36 100644
>> --- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
>> @@ -3451,6 +3451,169 @@ usb_1_role_switch: endpoint {
>>               };
>>           };
>> +        cci0: cci@...a000 {
>> +            compatible = "qcom,sc8280xp-cci", "qcom,msm8996-cci";
>> +            reg = <0 0x0ac4a000 0 0x1000>;
>> +
>> +            interrupts = <GIC_SPI 460 IRQ_TYPE_EDGE_RISING>;
>> +
>> +            clocks = <&camcc CAMCC_CAMNOC_AXI_CLK>,
>> +                 <&camcc CAMCC_SLOW_AHB_CLK_SRC>,
>> +                 <&camcc CAMCC_CPAS_AHB_CLK>,
>> +                 <&camcc CAMCC_CCI_0_CLK>;
>> +            clock-names = "camnoc_axi",
>> +                      "slow_ahb_src",
>> +                      "cpas_ahb",
>> +                      "cci";
>> +
>> +            power-domains = <&camcc TITAN_TOP_GDSC>;
>> +
>> +            pinctrl-names = "default", "sleep";
>> +            pinctrl-0 = <&cci0_default>;
>> +            pinctrl-1 = <&cci0_sleep>;
>> +
> property-names goes below property-n, just like with clocks 10 lines
> above :/

Didn't you ask for this to be re-ordered ?

https://lore.kernel.org/linux-arm-msm/d8b2867f-7fc6-4147-ae48-11bbf580b5bf@linaro.org/

quote

"
 > +
 > +			pinctrl-0 = <&cci0_default>;
 > +			pinctrl-1 = <&cci0_sleep>;
 > +			pinctrl-names = "default", "sleep";

please refer to Documentation/devicetree/bindings/dts-coding-style.rst
"

Never mind I suppose.

---
bod

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ