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Message-ID: <d19dac5c-eef6-4543-9eee-787262c0f52c@sirena.org.uk>
Date: Thu, 11 Jan 2024 13:00:42 +0000
From: Mark Brown <broonie@...nel.org>
To: David Lechner <dlechner@...libre.com>
Cc: Jonathan Cameron <jic23@...nel.org>, Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Conor Dooley <conor+dt@...nel.org>,
Michael Hennerich <michael.hennerich@...log.com>,
Nuno Sá <nuno.sa@...log.com>,
Frank Rowand <frowand.list@...il.com>,
Thierry Reding <thierry.reding@...il.com>,
Uwe Kleine-König <u.kleine-koenig@...gutronix.de>,
Jonathan Corbet <corbet@....net>, linux-spi@...r.kernel.org,
linux-iio@...r.kernel.org, devicetree@...r.kernel.org,
linux-doc@...r.kernel.org, linux-pwm@...r.kernel.org,
linux-kernel@...r.kernel.org, Lars-Peter Clausen <lars@...afoo.de>
Subject: Re: [PATCH 05/13] spi: axi-spi-engine: add SPI offload support
On Wed, Jan 10, 2024 at 04:31:25PM -0600, David Lechner wrote:
> On Wed, Jan 10, 2024 at 3:39 PM Mark Brown <broonie@...nel.org> wrote:
> > Glancing through here I'm not seeing anything here that handles DMA
> > mapping, given that the controller will clearly be doing DMA here that
> > seems surprising.
> In the use case implemented in this series, the RX data is going to
> DMA, but in general, that doesn't have to be the case. In theory, it
> could get piped directly to a DSP or something like that. So I left
> the RX DMA part out of the SPI controller and implemented as a
> separate device in "iio: offload: add new PWM triggered DMA buffer
> driver". The SPI controller itself isn't aware that it is connected to
> DMA (i.e. there are no registers that have to be poked to enable DMA
> or anything like that).
If there's a buffer being assigned to the device (or removed from the
device) it needs mapping, this will ensure the device is allowed to
access it if there's IOMMUs involved, and that there's no pending cache
operations which could corrupt data.
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