linux-kernel - Re: [PATCH v11 03/10] spi: Add multi-cs memories support in SPI core

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Message-ID: <3488ac24-a40d-4376-98f3-2d97ec1aa204@roeck-us.net>
Date: Fri, 12 Jan 2024 12:05:15 -0800
From: Guenter Roeck <linux@...ck-us.net>
To: Mark Brown <broonie@...nel.org>
Cc: Amit Kumar Mahapatra <amit.kumar-mahapatra@....com>,
 tudor.ambarus@...aro.org, pratyush@...nel.org, miquel.raynal@...tlin.com,
 richard@....at, vigneshr@...com, sbinding@...nsource.cirrus.com,
 lee@...nel.org, james.schulman@...rus.com, david.rhodes@...rus.com,
 rf@...nsource.cirrus.com, perex@...ex.cz, tiwai@...e.com,
 linux-spi@...r.kernel.org, linux-kernel@...r.kernel.org, michael@...le.cc,
 linux-mtd@...ts.infradead.org, nicolas.ferre@...rochip.com,
 alexandre.belloni@...tlin.com, claudiu.beznea@...on.dev,
 michal.simek@....com, linux-arm-kernel@...ts.infradead.org,
 alsa-devel@...a-project.org, patches@...nsource.cirrus.com,
 linux-sound@...r.kernel.org, git@....com, amitrkcian2002@...il.com
Subject: Re: [PATCH v11 03/10] spi: Add multi-cs memories support in SPI core

On 1/12/24 11:16, Mark Brown wrote:
> On Fri, Jan 12, 2024 at 11:11:07AM -0800, Guenter Roeck wrote:
>> On Sat, Nov 25, 2023 at 02:51:30PM +0530, Amit Kumar Mahapatra wrote:
> 
>>> AMD-Xilinx GQSPI controller has two advanced mode that allows the
>>> controller to consider two flashes as one single device.
> 
> ...
> 
>> With this patch in the mainline kernel, two of my qemu emulations
>> (quanta-q71l-bmc and almetto-bmc) fail to instantiate the first SPI
>> controller and thus fail to boot from SPI. The error message is
> 
> Not sure what quanta-q711-bmc is - is almetto-bmc really palmetto-bmc
> (which has a mainline DT with a SPI flash)?
> 

Yes, sorry, it should have been palmetto-bmc.

quanta-q71l-bmc: See
arch/arm/boot/dts/aspeed/aspeed-bmc-quanta-q71l.dts

(it is q71l, not q711)

Guenter