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Message-ID: <CAOnJCUJuDk6euX_XKiQ3H=TSGU02fgGgqSq-WycDwurq1XkDHw@mail.gmail.com>
Date: Fri, 12 Jan 2024 12:17:23 -0800
From: Atish Patra <atishp@...shpatra.org>
To: Yu Chien Peter Lin <peterlin@...estech.com>
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Subject: Re: [PATCH v7 06/16] perf: RISC-V: Eliminate redundant interrupt
enable/disable operations
On Tue, Jan 9, 2024 at 11:40 PM Yu Chien Peter Lin
<peterlin@...estech.com> wrote:
>
> The interrupt enable/disable operations are already performed by the
> IRQ chip functions riscv_intc_irq_unmask()/riscv_intc_irq_mask() during
> enable_percpu_irq()/disable_percpu_irq(). It can be done only once.
>
> Signed-off-by: Yu Chien Peter Lin <peterlin@...estech.com>
> ---
> This patch allows us to drop unnecessary ALT_SBI_PMU_OVF_{DISABLE,ENABLE}
> in the initial PATCH3 [1].
>
> [1] https://patchwork.kernel.org/project/linux-riscv/patch/202309070216351002738-4-peterlin@andestech.com/
>
> Changes v1 -> v2:
> - New patch
> Changes v2 -> v3:
> - No change
> Changes v3 -> v4:
> - No change
> Changes v4 -> v5:
> - No change
> Changes v5 -> v6:
> - No change
> Changes v6 -> v7:
> - No change
> ---
> drivers/perf/riscv_pmu_sbi.c | 2 --
> 1 file changed, 2 deletions(-)
>
> diff --git a/drivers/perf/riscv_pmu_sbi.c b/drivers/perf/riscv_pmu_sbi.c
> index 16acd4dcdb96..2edbc37abadf 100644
> --- a/drivers/perf/riscv_pmu_sbi.c
> +++ b/drivers/perf/riscv_pmu_sbi.c
> @@ -781,7 +781,6 @@ static int pmu_sbi_starting_cpu(unsigned int cpu, struct hlist_node *node)
> if (riscv_pmu_use_irq) {
> cpu_hw_evt->irq = riscv_pmu_irq;
> csr_clear(CSR_IP, BIT(riscv_pmu_irq_num));
> - csr_set(CSR_IE, BIT(riscv_pmu_irq_num));
> enable_percpu_irq(riscv_pmu_irq, IRQ_TYPE_NONE);
> }
>
> @@ -792,7 +791,6 @@ static int pmu_sbi_dying_cpu(unsigned int cpu, struct hlist_node *node)
> {
> if (riscv_pmu_use_irq) {
> disable_percpu_irq(riscv_pmu_irq);
> - csr_clear(CSR_IE, BIT(riscv_pmu_irq_num));
> }
>
> /* Disable all counters access for user mode now */
> --
> 2.34.1
>
Reviewed-by: Atish Patra <atishp@...osinc.com>
--
Regards,
Atish
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