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Message-ID: <20240116-music-luckiness-3220a9efdbbf@spud>
Date: Tue, 16 Jan 2024 17:24:42 +0000
From: Conor Dooley <conor@...nel.org>
To: Inochi Amaoto <inochiama@...look.com>
Cc: Conor Dooley <conor.dooley@...rochip.com>,
	Michael Turquette <mturquette@...libre.com>,
	Stephen Boyd <sboyd@...nel.org>, Rob Herring <robh+dt@...nel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
	Conor Dooley <conor+dt@...nel.org>, Chao Wei <chao.wei@...hgo.com>,
	Chen Wang <unicorn_wang@...look.com>,
	Paul Walmsley <paul.walmsley@...ive.com>,
	Palmer Dabbelt <palmer@...belt.com>,
	Albert Ou <aou@...s.berkeley.edu>,
	Jisheng Zhang <jszhang@...nel.org>,
	Liu Gui <kenneth.liu@...hgo.com>,
	Jingbao Qiu <qiujingbao.dlmu@...il.com>, dlan@...too.org,
	linux-clk@...r.kernel.org, devicetree@...r.kernel.org,
	linux-kernel@...r.kernel.org, linux-riscv@...ts.infradead.org
Subject: Re: [PATCH v6 1/4] dt-bindings: clock: sophgo: Add clock controller
 of SG2000 series SoC

On Tue, Jan 16, 2024 at 04:00:45PM +0800, Inochi Amaoto wrote:
> >On Tue, Jan 16, 2024 at 08:27:59AM +0800, Inochi Amaoto wrote:
> >>> On Sun, Jan 14, 2024 at 12:16:58PM +0800, Inochi Amaoto wrote:
> >>>> SG2000 series SoC has the same clock as CV1810 series, but the clock
> >>>> related to A53 is functional in SG2000 series. So a new compatible
> >>>> string is needed for the new SoC.
> >>>>
> >>>> Add definition for the clock controller of the SG2000 series SoC.
> >>>>
> >>>> Signed-off-by: Inochi Amaoto <inochiama@...look.com>
> >>>> Link: https://github.com/sophgo/sophgo-doc/releases/tag/sg2000-datasheet-v1.0-alpha
> >>>> ---
> >>>>  Documentation/devicetree/bindings/clock/sophgo,cv1800-clk.yaml | 3 ++-
> >>>>  1 file changed, 2 insertions(+), 1 deletion(-)
> >>>>
> >>>> diff --git a/Documentation/devicetree/bindings/clock/sophgo,cv1800-clk.yaml b/Documentation/devicetree/bindings/clock/sophgo,cv1800-clk.yaml
> >>>> index c1dc24673c0d..59ef41adb539 100644
> >>>> --- a/Documentation/devicetree/bindings/clock/sophgo,cv1800-clk.yaml
> >>>> +++ b/Documentation/devicetree/bindings/clock/sophgo,cv1800-clk.yaml
> >>>> @@ -4,7 +4,7 @@
> >>>>  $id: http://devicetree.org/schemas/clock/sophgo,cv1800-clk.yaml#
> >>>>  $schema: http://devicetree.org/meta-schemas/core.yaml#
> >>>>
> >>>> -title: Sophgo CV1800 Series Clock Controller
> >>>> +title: Sophgo CV1800/SG2000 Series Clock Controller
> >>>>
> >>>>  maintainers:
> >>>>    - Inochi Amaoto <inochiama@...look.com>
> >>>> @@ -14,6 +14,7 @@ properties:
> >>>>      enum:
> >>>>        - sophgo,cv1800-clk
> >>>>        - sophgo,cv1810-clk
> >>>> +      - sophgo,sg2000-clk
> >>>
> >>> I recall before you mentioned that the Sophgo folks were considering
> >>> renaming one of their devices. Is the sg2000 the renamed one, or a
> >>> different chip?
> >
> >> The sg2000/sg2002 SoCs have one A53 core which cv1812/cv1813 SoCs
> >> don't have. I prefer sg2000/sg2002 are different chips, or at least
> >> an enhanced version of existed cv1812/cv1813. It is not a simple
> >> rename.
> >>
> >> For this patch, the sg2000 doesn't need to disable A53 related clocks
> >> like cv18xx series. So this compatible is needed to bind to this new
> >> logic.
> >
> >I'm not disputing the unique compatible - you previously mentioned that
> >Sophgo were considering rebranding the cvXXXX series of chips going
> >forward and that one particular chip might undergo a name change.
> >I was wondering if this was that chip or just another device in the
> >series.
> >
> >Thanks,
> >Conor.
> 
> For your question, this is the rename chip I mentioned.
> 
> This is the name mapping I have known:
> cv1812cp -> sg2000
> cv1813h -> sg2002

Great, thanks :)

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