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Message-Id: <20240116213001.3691629-2-hugo@hugovil.com>
Date: Tue, 16 Jan 2024 16:29:58 -0500
From: Hugo Villeneuve <hugo@...ovil.com>
To: gregkh@...uxfoundation.org,
jirislaby@...nel.org,
jan.kundrat@...net.cz,
shc_work@...l.ru
Cc: linux-kernel@...r.kernel.org,
linux-serial@...r.kernel.org,
hugo@...ovil.com,
Hugo Villeneuve <hvilleneuve@...onoff.com>,
stable@...r.kernel.org
Subject: [PATCH 1/4] serial: max310x: set default value when reading clock ready bit
From: Hugo Villeneuve <hvilleneuve@...onoff.com>
If regmap_read() returns a non-zero value, the 'val' variable can be left
uninitialized.
Clear it before calling regmap_read() to make sure we properly detect
the clock ready bit.
Fixes: 4cf9a888fd3c ("serial: max310x: Check the clock readiness")
Cc: <stable@...r.kernel.org>
Signed-off-by: Hugo Villeneuve <hvilleneuve@...onoff.com>
---
drivers/tty/serial/max310x.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/tty/serial/max310x.c b/drivers/tty/serial/max310x.c
index f3a99daebdaa..b2c753ba9cbf 100644
--- a/drivers/tty/serial/max310x.c
+++ b/drivers/tty/serial/max310x.c
@@ -641,7 +641,7 @@ static u32 max310x_set_ref_clk(struct device *dev, struct max310x_port *s,
/* Wait for crystal */
if (xtal) {
- unsigned int val;
+ unsigned int val = 0;
msleep(10);
regmap_read(s->regmap, MAX310X_STS_IRQSTS_REG, &val);
if (!(val & MAX310X_STS_CLKREADY_BIT)) {
--
2.39.2
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