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Date: Tue, 16 Jan 2024 23:34:44 +0200
From: andy.shevchenko@...il.com
To: Philipp Stanner <pstanner@...hat.com>
Cc: Jonathan Corbet <corbet@....net>, Hans de Goede <hdegoede@...hat.com>,
	Maarten Lankhorst <maarten.lankhorst@...ux.intel.com>,
	Maxime Ripard <mripard@...nel.org>,
	Thomas Zimmermann <tzimmermann@...e.de>,
	David Airlie <airlied@...il.com>, Daniel Vetter <daniel@...ll.ch>,
	Bjorn Helgaas <bhelgaas@...gle.com>,
	Sam Ravnborg <sam@...nborg.org>, dakr@...hat.com,
	linux-doc@...r.kernel.org, linux-kernel@...r.kernel.org,
	dri-devel@...ts.freedesktop.org, linux-pci@...r.kernel.org
Subject: Re: [PATCH 06/10] pci: move pinned status bit to pci_dev struct

Mon, Jan 15, 2024 at 03:46:17PM +0100, Philipp Stanner kirjoitti:
> The bit describing whether the PCI device is currently pinned is stored
> in the PCI devres struct. To clean up and simplify the pci-devres API,

"PCI devres", 'pci-devres', ...
Shouldn't these (and across entire series) be consistent terms?
E.g., "PCI devres API".

> it's better if this information is stored in the pci_dev struct, because

pci_dev struct --> struct pci_dev

> it allows for checking that device's pinned-status directly through the
> device struct.
> This will later permit simplifying  pcim_enable_device().

> Move the 'pinned' boolean bit to struct pci_dev.

..

>  	u8		pm_cap;		/* PM capability offset */
>  	unsigned int	enabled:1;	/* Whether this dev is enabled */
> +	unsigned int	pinned:1;	/* Whether this dev is pinned */
>  	unsigned int	imm_ready:1;	/* Supports Immediate Readiness */
>  	unsigned int	pme_support:5;	/* Bitmask of states from which PME#
>  					   can be generated */

First of all, I think it's better to group PM stuff, like

	u8		pm_cap;		/* PM capability offset */
	unsigned int	pme_support:5;	/* Bitmask of states from which PME#
					   can be generated */
	unsigned int	imm_ready:1;	/* Supports Immediate Readiness */
	unsigned int	enabled:1;	/* Whether this dev is enabled */
	unsigned int	pinned:1;	/* Whether this dev is pinned */

Second, does this layout anyhow related to the HW layout? (For example,
PME bits and their location in some HW register vs. these bitfields)
If so, but not sure, it might be good to preserve (to some extent) the
order.

-- 
With Best Regards,
Andy Shevchenko



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