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Date: Tue, 16 Jan 2024 09:36:14 +0000
From: Conor Dooley <conor.dooley@...rochip.com>
To: Devarsh Thakkar <devarsht@...com>
CC: Conor Dooley <conor@...nel.org>, <jyri.sarha@....fi>,
	<tomi.valkeinen@...asonboard.com>, <airlied@...il.com>, <daniel@...ll.ch>,
	<maarten.lankhorst@...ux.intel.com>, <mripard@...nel.org>,
	<tzimmermann@...e.de>, <robh+dt@...nel.org>,
	<krzysztof.kozlowski+dt@...aro.org>, <conor+dt@...nel.org>,
	<dri-devel@...ts.freedesktop.org>, <devicetree@...r.kernel.org>,
	<linux-kernel@...r.kernel.org>, <praneeth@...com>, <nm@...com>,
	<vigneshr@...com>, <a-bhatia1@...com>, <j-luthra@...com>, <kristo@...nel.org>
Subject: Re: [PATCH 1/2] dt-bindings: display: ti,am65x-dss: Add support for
 common1 region

On Tue, Jan 16, 2024 at 02:43:25PM +0530, Devarsh Thakkar wrote:
> Hi Conor,
> 
> Thanks for the review.
> 
> On 15/01/24 21:47, Conor Dooley wrote:
> > On Mon, Jan 15, 2024 at 06:27:15PM +0530, Devarsh Thakkar wrote:
> >> TI keystone display subsystem present in AM65 and other SoCs such as AM62
> > 
> > Do all 3 SoCs supported by this binding (am625 am62a7 am65x) have this
> > common1 register? If not, you should limit it the platforms that do have
> > it.
> > 
> 
> Yes all 3 SoCs supported by binding have common1 register space supported.

Okay, thanks.

Acked-by: Conor Dooley <conor.dooley@...rochip.com>

Cheers,
Conor.

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