linux-kernel - Re: [PATCH] soc: qcom: rpmh-rsc: Enhance check for VREG in-flight request

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Date: Wed, 17 Jan 2024 12:49:44 +0100
From: Konrad Dybcio <konrad.dybcio@...aro.org>
To: Maulik Shah <quic_mkshah@...cinc.com>,
 Bjorn Andersson <andersson@...nel.org>
Cc: linux-arm-msm@...r.kernel.org, linux-kernel@...r.kernel.org,
 quic_eberman@...cinc.com, quic_collinsd@...cinc.com, quic_lsrao@...cinc.com
Subject: Re: [PATCH] soc: qcom: rpmh-rsc: Enhance check for VREG in-flight
 request



On 1/17/24 09:54, Maulik Shah wrote:
> Each RPMh VREG accelerator resource has 3 or 4 contiguous 4-byte aligned
> addresses associated with it. These control voltage, enable state, mode,
> and in legacy targets, voltage headroom. The current in-flight request
> checking logic looks for exact address matches. Requests for different
> addresses of the same RPMh resource as thus not detected as in-flight.
> 
> Enhance the in-flight request check for VREG requests by ignoring the
> address offset. This ensures that only one request is allowed to be
> in-flight for a given VREG resource. This is needed to avoid scenarios
> where request commands are carried out by RPMh hardware out-of-order
> leading to LDO regulator over-current protection triggering.
> 
> Signed-off-by: Maulik Shah <quic_mkshah@...cinc.com>
> Signed-off-by: Elliot Berman <quic_eberman@...cinc.com>
> ---
>   drivers/soc/qcom/rpmh-rsc.c | 20 +++++++++++++++++++-
>   1 file changed, 19 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/soc/qcom/rpmh-rsc.c b/drivers/soc/qcom/rpmh-rsc.c
> index a021dc71807b..5371d7e3090a 100644
> --- a/drivers/soc/qcom/rpmh-rsc.c
> +++ b/drivers/soc/qcom/rpmh-rsc.c
> @@ -1,6 +1,7 @@
>   // SPDX-License-Identifier: GPL-2.0
>   /*
>    * Copyright (c) 2016-2018, The Linux Foundation. All rights reserved.
> + * Copyright (c) 2023-2024, Qualcomm Innovation Center, Inc. All rights reserved.
>    */
>   
>   #define pr_fmt(fmt) "%s " fmt, KBUILD_MODNAME
> @@ -91,6 +92,15 @@ enum {
>   #define CMD_STATUS_ISSUED		BIT(8)
>   #define CMD_STATUS_COMPL		BIT(16)
>   
> +#define ACCL_TYPE(addr)			((addr >> 16) & 0xF)
> +#define VREG_ADDR(addr)			(addr & ~0xF)

It would be nice to add some #define FNAME GENMASK(x, y) accessed
with FIELD_GET(FNAME, foobar), so that the code is a bit more
self-explanatory

Konrad