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Message-ID: <20240117173458.2312669-7-quic_sibis@quicinc.com>
Date: Wed, 17 Jan 2024 23:04:57 +0530
From: Sibi Sankar <quic_sibis@...cinc.com>
To: <sudeep.holla@....com>, <cristian.marussi@....com>, <andersson@...nel.org>,
<konrad.dybcio@...aro.org>, <jassisinghbrar@...il.com>,
<robh+dt@...nel.org>, <krzysztof.kozlowski+dt@...aro.org>
CC: <linux-kernel@...r.kernel.org>, <linux-arm-msm@...r.kernel.org>,
<devicetree@...r.kernel.org>, <quic_rgottimu@...cinc.com>,
<quic_kshivnan@...cinc.com>, <quic_sibis@...cinc.com>,
<conor+dt@...nel.org>
Subject: [RFC 6/7] arm64: dts: qcom: x1e80100: Enable cpufreq
Enable cpufreq on X1E80100 SoCs through the SCMI perf protocol node.
Signed-off-by: Sibi Sankar <quic_sibis@...cinc.com>
---
arch/arm64/boot/dts/qcom/x1e80100.dtsi | 27 ++++++++++++++++++++++++++
1 file changed, 27 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/x1e80100.dtsi b/arch/arm64/boot/dts/qcom/x1e80100.dtsi
index afdbd27f8346..6856a206f7fc 100644
--- a/arch/arm64/boot/dts/qcom/x1e80100.dtsi
+++ b/arch/arm64/boot/dts/qcom/x1e80100.dtsi
@@ -62,6 +62,7 @@ CPU0: cpu@0 {
compatible = "qcom,oryon";
reg = <0x0 0x0>;
enable-method = "psci";
+ clocks = <&scmi_dvfs 0>;
next-level-cache = <&L2_0>;
power-domains = <&CPU_PD0>;
power-domain-names = "psci";
@@ -79,6 +80,7 @@ CPU1: cpu@100 {
compatible = "qcom,oryon";
reg = <0x0 0x100>;
enable-method = "psci";
+ clocks = <&scmi_dvfs 0>;
next-level-cache = <&L2_0>;
power-domains = <&CPU_PD1>;
power-domain-names = "psci";
@@ -90,6 +92,7 @@ CPU2: cpu@200 {
compatible = "qcom,oryon";
reg = <0x0 0x200>;
enable-method = "psci";
+ clocks = <&scmi_dvfs 0>;
next-level-cache = <&L2_0>;
power-domains = <&CPU_PD2>;
power-domain-names = "psci";
@@ -101,6 +104,7 @@ CPU3: cpu@300 {
compatible = "qcom,oryon";
reg = <0x0 0x300>;
enable-method = "psci";
+ clocks = <&scmi_dvfs 0>;
next-level-cache = <&L2_0>;
power-domains = <&CPU_PD3>;
power-domain-names = "psci";
@@ -112,6 +116,7 @@ CPU4: cpu@...00 {
compatible = "qcom,oryon";
reg = <0x0 0x10000>;
enable-method = "psci";
+ clocks = <&scmi_dvfs 1>;
next-level-cache = <&L2_1>;
power-domains = <&CPU_PD4>;
power-domain-names = "psci";
@@ -129,6 +134,7 @@ CPU5: cpu@...00 {
compatible = "qcom,oryon";
reg = <0x0 0x10100>;
enable-method = "psci";
+ clocks = <&scmi_dvfs 1>;
next-level-cache = <&L2_1>;
power-domains = <&CPU_PD5>;
power-domain-names = "psci";
@@ -140,6 +146,7 @@ CPU6: cpu@...00 {
compatible = "qcom,oryon";
reg = <0x0 0x10200>;
enable-method = "psci";
+ clocks = <&scmi_dvfs 1>;
next-level-cache = <&L2_1>;
power-domains = <&CPU_PD6>;
power-domain-names = "psci";
@@ -151,6 +158,7 @@ CPU7: cpu@...00 {
compatible = "qcom,oryon";
reg = <0x0 0x10300>;
enable-method = "psci";
+ clocks = <&scmi_dvfs 1>;
next-level-cache = <&L2_1>;
power-domains = <&CPU_PD7>;
power-domain-names = "psci";
@@ -162,6 +170,7 @@ CPU8: cpu@...00 {
compatible = "qcom,oryon";
reg = <0x0 0x20000>;
enable-method = "psci";
+ clocks = <&scmi_dvfs 2>;
next-level-cache = <&L2_2>;
power-domains = <&CPU_PD8>;
power-domain-names = "psci";
@@ -179,6 +188,7 @@ CPU9: cpu@...00 {
compatible = "qcom,oryon";
reg = <0x0 0x20100>;
enable-method = "psci";
+ clocks = <&scmi_dvfs 2>;
next-level-cache = <&L2_2>;
power-domains = <&CPU_PD9>;
power-domain-names = "psci";
@@ -190,6 +200,7 @@ CPU10: cpu@...00 {
compatible = "qcom,oryon";
reg = <0x0 0x20200>;
enable-method = "psci";
+ clocks = <&scmi_dvfs 2>;
next-level-cache = <&L2_2>;
power-domains = <&CPU_PD10>;
power-domain-names = "psci";
@@ -201,6 +212,7 @@ CPU11: cpu@...00 {
compatible = "qcom,oryon";
reg = <0x0 0x20300>;
enable-method = "psci";
+ clocks = <&scmi_dvfs 2>;
next-level-cache = <&L2_2>;
power-domains = <&CPU_PD11>;
power-domain-names = "psci";
@@ -303,6 +315,21 @@ scm: scm {
interconnects = <&aggre2_noc MASTER_CRYPTO QCOM_ICC_TAG_ALWAYS
&mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>;
};
+
+ scmi {
+ compatible = "arm,scmi";
+ mboxes = <&cpucp_mbox 0>, <&cpucp_mbox 2>;
+ mbox-names = "tx", "rx";
+ shmem = <&cpu_scp_lpri0>, <&cpu_scp_lpri1>;
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ scmi_dvfs: protocol@13 {
+ reg = <0x13>;
+ #clock-cells = <1>;
+ };
+ };
};
clk_virt: interconnect-0 {
--
2.34.1
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