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Message-ID: <1705604904-471889-1-git-send-email-radhey.shyam.pandey@amd.com>
Date: Fri, 19 Jan 2024 00:38:22 +0530
From: Radhey Shyam Pandey <radhey.shyam.pandey@....com>
To: <dlemoal@...nel.org>, <cassel@...nel.org>, <richardcochran@...il.com>,
	<piyush.mehta@...inx.com>, <axboe@...nel.dk>, <michal.simek@....com>
CC: <linux-ide@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
	<git@....com>, Radhey Shyam Pandey <radhey.shyam.pandey@....com>
Subject: [PATCH 0/2] ata: ahci_ceva: fix xilinx GT PHY support

This patchset add error handling for Xilinx GT PHY support.
It also fixes suspend warning 'Underflow of regulator enable count'. 

xilinx-zcu102-20232:/home/petalinux# echo mem > /sys/power/state
[  481.335785] PM: suspend entry (deep)
<snip>
[  481.483682] sd 1:0:0:0: [sda] Synchronizing SCSI cache
[  481.517440] macb ff0e0000.ethernet eth0: Link is Down
[  481.523041] macb ff0e0000.ethernet: gem-ptp-timer ptp clock unregistered.
[  481.530018] ata2.00: Entering standby power mode
[  481.583873] regulator-dummy: Underflow of regulator enable count
[  481.589876] regulator-dummy: Underflow of regulator enable count
[  481.595883] regulator-dummy: Underflow of regulator enable count


Piyush Mehta (2):
  ata: ahci_ceva: fix error handling for Xilinx GT PHY support
  ata: ahci_ceva: add missing enable regulator API for Xilinx GT PHY
    support

 drivers/ata/ahci_ceva.c | 55 ++++++++++++++++++++++++++++++-----------
 1 file changed, 41 insertions(+), 14 deletions(-)

-- 
2.34.1


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