| lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
|
Open Source and information security mailing list archives
| ||
|
Message-ID: <121f6c6f65efcca3ad6dbe5264563561@manjaro.org>
Date: Thu, 18 Jan 2024 20:20:28 +0100
From: Dragan Simic <dsimic@...jaro.org>
To: Alexey Charkov <alchark@...il.com>
Cc: Rob Herring <robh+dt@...nel.org>, Krzysztof Kozlowski
<krzysztof.kozlowski+dt@...aro.org>, Conor Dooley <conor+dt@...nel.org>,
Heiko Stuebner <heiko@...ech.de>, Sebastian Reichel
<sebastian.reichel@...labora.com>, Cristian Ciocaltea
<cristian.ciocaltea@...labora.com>, Christopher Obbard
<chris.obbard@...labora.com>, Tamás Szűcs
<szucst@....uni-miskolc.hu>, Shreeya Patel <shreeya.patel@...labora.com>,
Kever Yang <kever.yang@...k-chips.com>, Jagan Teki <jagan@...eble.ai>, Chris
Morgan <macromorgan@...mail.com>, devicetree@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, linux-rockchip@...ts.infradead.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2] arm64: dts: rockchip: enable built-in thermal
monitoring on rk3588
On 2024-01-09 20:19, Alexey Charkov wrote:
> Include thermal zones information in device tree for rk3588 variants
> and enable the built-in thermal sensing ADC on RADXA Rock 5B
>
> Signed-off-by: Alexey Charkov <alchark@...il.com>
> ---
> Changes in v2:
> - Dropped redundant comments
> - Included all CPU cores in cooling maps
> - Split cooling maps into more granular ones utilizing TSADC
> channels 1-3 which measure temperature by separate CPU clusters
> instead of channel 0 which measures the center of the SoC die
> ---
> .../boot/dts/rockchip/rk3588-rock-5b.dts | 4 +
> arch/arm64/boot/dts/rockchip/rk3588s.dtsi | 151 ++++++++++++++++++
> 2 files changed, 155 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
> b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
> index a5a104131403..f9d540000de3 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
> +++ b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
> @@ -772,3 +772,7 @@ &usb_host1_ehci {
> &usb_host1_ohci {
> status = "okay";
> };
> +
> +&tsadc {
> + status = "okay";
> +};
I keep forgetting to note that enabling it for the Rock 5B should
be performed in a separate patch.
> diff --git a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
> b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
> index 8aa0499f9b03..8d54998d0ecc 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
> +++ b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
> @@ -10,6 +10,7 @@
> #include <dt-bindings/reset/rockchip,rk3588-cru.h>
> #include <dt-bindings/phy/phy.h>
> #include <dt-bindings/ata/ahci.h>
> +#include <dt-bindings/thermal/thermal.h>
>
> / {
> compatible = "rockchip,rk3588";
> @@ -2112,6 +2113,156 @@ tsadc: tsadc@...00000 {
> status = "disabled";
> };
>
> + thermal_zones: thermal-zones {
> + /* sensor near the center of the whole chip */
> + soc_thermal: soc-thermal {
> + polling-delay-passive = <20>;
> + polling-delay = <1000>;
> + sustainable-power = <2100>;
> + thermal-sensors = <&tsadc 0>;
> +
> + trips {
> + soc_crit: soc-crit {
> + temperature = <115000>;
> + hysteresis = <2000>;
> + type = "critical";
> + };
> + };
> + };
As already noted in my previous response, perhaps it whould be
better to name it package_thermal instead. That way, it should
be more self descriptive.
> + /* sensor between A76 cores 0 and 1 */
> + bigcore0_thermal: bigcore0-thermal {
> + polling-delay-passive = <20>;
> + polling-delay = <1000>;
> + thermal-sensors = <&tsadc 1>;
> +
> + trips {
> + bigcore0_alert: bigcore0-alert {
> + temperature = <85000>;
> + hysteresis = <2000>;
> + type = "passive";
> + };
> + bigcore0_crit: bigcore0-crit {
> + temperature = <115000>;
> + hysteresis = <2000>;
> + type = "critical";
> + };
> + };
As already noted in my previous message, perhaps another trip,
of the "hot" type, should be added here.
> + cooling-maps {
> + map0 {
> + trip = <&bigcore0_alert>;
> + cooling-device =
> + <&cpu_b0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
> + <&cpu_b1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
> + contribution = <1024>;
> + };
> + };
> + };
> +
> + /* sensor between A76 cores 2 and 3 */
> + bigcore2_thermal: bigcore2-thermal {
> + polling-delay-passive = <20>;
> + polling-delay = <1000>;
> + thermal-sensors = <&tsadc 2>;
> +
> + trips {
> + bigcore2_alert: bigcore2-alert {
> + temperature = <85000>;
> + hysteresis = <2000>;
> + type = "passive";
> + };
> + bigcore2_crit: bigcore2-crit {
> + temperature = <115000>;
> + hysteresis = <2000>;
> + type = "critical";
> + };
> + };
The same suggestion about one more "hot" trip applies here as well.
> + cooling-maps {
> + map1 {
> + trip = <&bigcore2_alert>;
> + cooling-device =
> + <&cpu_b2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
> + <&cpu_b3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
> + contribution = <1024>;
> + };
> + };
> + };
> +
> + /* sensor between the four A55 cores */
> + little_core_thermal: littlecore-thermal {
> + polling-delay-passive = <20>;
> + polling-delay = <1000>;
> + thermal-sensors = <&tsadc 3>;
> +
> + trips {
> + littlecore_alert: littlecore-alert {
> + temperature = <85000>;
> + hysteresis = <2000>;
> + type = "passive";
> + };
> + littlecore_crit: littlecore-crit {
> + temperature = <115000>;
> + hysteresis = <2000>;
> + type = "critical";
> + };
> + };
The same suggestion about one more "hot" trip applies here as well.
> + cooling-maps {
> + map2 {
> + trip = <&littlecore_alert>;
> + cooling-device =
> + <&cpu_l0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
> + <&cpu_l1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
> + <&cpu_l2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
> + <&cpu_l3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
> + contribution = <1024>;
> + };
> + };
> + };
> +
> + /* sensor near the PD_CENTER power domain */
> + center_thermal: center-thermal {
> + polling-delay-passive = <20>;
> + polling-delay = <1000>;
> + thermal-sensors = <&tsadc 4>;
> +
> + trips {
> + center_crit: center-crit {
> + temperature = <115000>;
> + hysteresis = <2000>;
> + type = "critical";
> + };
> + };
> + };
> +
> + gpu_thermal: gpu-thermal {
> + polling-delay-passive = <20>;
> + polling-delay = <1000>;
> + thermal-sensors = <&tsadc 5>;
> +
> + trips {
> + gpu_crit: gpu-crit {
> + temperature = <115000>;
> + hysteresis = <2000>;
> + type = "critical";
> + };
> + };
> + };
> +
> + npu_thermal: npu-thermal {
> + polling-delay-passive = <20>;
> + polling-delay = <1000>;
> + thermal-sensors = <&tsadc 6>;
> +
> + trips {
> + npu_crit: npu-crit {
> + temperature = <115000>;
> + hysteresis = <2000>;
> + type = "critical";
> + };
> + };
> + };
> + };
> +
> saradc: adc@...10000 {
> compatible = "rockchip,rk3588-saradc";
> reg = <0x0 0xfec10000 0x0 0x10000>;
Powered by blists - more mailing lists