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Message-ID: <CADnq5_MFLxNcKnvT6gr1RBiBoQrnynqQmo9kyKD86+_7pHa4TQ@mail.gmail.com>
Date: Thu, 18 Jan 2024 15:19:14 -0500
From: Alex Deucher <alexdeucher@...il.com>
To: Nikita Zhandarovich <n.zhandarovich@...tech.ru>
Cc: Alex Deucher <alexander.deucher@....com>, "Pan, Xinhui" <Xinhui.Pan@....com>, 
	linux-kernel@...r.kernel.org, amd-gfx@...ts.freedesktop.org, 
	dri-devel@...ts.freedesktop.org, Daniel Vetter <daniel@...ll.ch>, 
	David Airlie <airlied@...il.com>, Christian König <christian.koenig@....com>, 
	lvc-project@...uxtesting.org
Subject: Re: [PATCH] drm/radeon: remove dead code in ni_mc_load_microcode()

On Thu, Jan 18, 2024 at 3:52 AM Nikita Zhandarovich
<n.zhandarovich@...tech.ru> wrote:
>
> Inside the if block with (running == 0), the checks for 'running'
> possibly being non-zero are redundant. Remove them altogether.
>
> This change is similar to the one authored by Heinrich Schuchardt
> <xypron.glpk@....de> in commit
> ddbbd3be9679 ("drm/radeon: remove dead code, si_mc_load_microcode (v2)")
>
> Found by Linux Verification Center (linuxtesting.org) with static
> analysis tool Svace.
>
> Fixes: 0af62b016804 ("drm/radeon/kms: add ucode loader for NI")
> Signed-off-by: Nikita Zhandarovich <n.zhandarovich@...tech.ru>

Applied both of your patches.  Thanks!

Alex

> ---
>  drivers/gpu/drm/radeon/ni.c | 10 +---------
>  1 file changed, 1 insertion(+), 9 deletions(-)
>
> diff --git a/drivers/gpu/drm/radeon/ni.c b/drivers/gpu/drm/radeon/ni.c
> index 927e5f42e97d..8eac8c090433 100644
> --- a/drivers/gpu/drm/radeon/ni.c
> +++ b/drivers/gpu/drm/radeon/ni.c
> @@ -624,7 +624,7 @@ static const u32 cayman_io_mc_regs[BTC_IO_MC_REGS_SIZE][2] = {
>  int ni_mc_load_microcode(struct radeon_device *rdev)
>  {
>         const __be32 *fw_data;
> -       u32 mem_type, running, blackout = 0;
> +       u32 mem_type, running;
>         u32 *io_mc_regs;
>         int i, ucode_size, regs_size;
>
> @@ -659,11 +659,6 @@ int ni_mc_load_microcode(struct radeon_device *rdev)
>         running = RREG32(MC_SEQ_SUP_CNTL) & RUN_MASK;
>
>         if ((mem_type == MC_SEQ_MISC0_GDDR5_VALUE) && (running == 0)) {
> -               if (running) {
> -                       blackout = RREG32(MC_SHARED_BLACKOUT_CNTL);
> -                       WREG32(MC_SHARED_BLACKOUT_CNTL, 1);
> -               }
> -
>                 /* reset the engine and set to writable */
>                 WREG32(MC_SEQ_SUP_CNTL, 0x00000008);
>                 WREG32(MC_SEQ_SUP_CNTL, 0x00000010);
> @@ -689,9 +684,6 @@ int ni_mc_load_microcode(struct radeon_device *rdev)
>                                 break;
>                         udelay(1);
>                 }
> -
> -               if (running)
> -                       WREG32(MC_SHARED_BLACKOUT_CNTL, blackout);
>         }
>
>         return 0;

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