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Message-ID: <20240119111132.1290455-5-tudor.ambarus@linaro.org>
Date: Fri, 19 Jan 2024 11:11:28 +0000
From: Tudor Ambarus <tudor.ambarus@...aro.org>
To: peter.griffin@...aro.org,
	mturquette@...libre.com,
	sboyd@...nel.org,
	robh+dt@...nel.org,
	krzysztof.kozlowski+dt@...aro.org,
	conor+dt@...nel.org
Cc: andi.shyti@...nel.org,
	alim.akhtar@...sung.com,
	s.nawrocki@...sung.com,
	tomasz.figa@...il.com,
	cw00.choi@...sung.com,
	linux-arm-kernel@...ts.infradead.org,
	linux-samsung-soc@...r.kernel.org,
	linux-clk@...r.kernel.org,
	devicetree@...r.kernel.org,
	linux-kernel@...r.kernel.org,
	linux-i2c@...r.kernel.org,
	andre.draszik@...aro.org,
	semen.protsenko@...aro.org,
	willmcvicker@...gle.com,
	kernel-team@...roid.com,
	Tudor Ambarus <tudor.ambarus@...aro.org>
Subject: [PATCH v4 4/8] arm64: dts: exynos: gs101: remove reg-io-width from serial

Remove the reg-io-width property in order to comply with the bindings.

The entire bus (PERIC) on which the GS101 serial resides only allows
32-bit register accesses. The reg-io-width dt property is disallowed
for the "google,gs101-uart" compatible and instead the iotype is
inferred from the compatible.

Reviewed-by: Peter Griffin <peter.griffin@...aro.org>
Reviewed-by: Sam Protsenko <semen.protsenko@...aro.org>
Signed-off-by: Tudor Ambarus <tudor.ambarus@...aro.org>
---
 arch/arm64/boot/dts/exynos/google/gs101.dtsi | 1 -
 1 file changed, 1 deletion(-)

diff --git a/arch/arm64/boot/dts/exynos/google/gs101.dtsi b/arch/arm64/boot/dts/exynos/google/gs101.dtsi
index d838e3a7af6e..4e5f4c748906 100644
--- a/arch/arm64/boot/dts/exynos/google/gs101.dtsi
+++ b/arch/arm64/boot/dts/exynos/google/gs101.dtsi
@@ -366,7 +366,6 @@ usi_uart: usi@...000c0 {
 			serial_0: serial@...00000 {
 				compatible = "google,gs101-uart";
 				reg = <0x10a00000 0xc0>;
-				reg-io-width = <4>;
 				interrupts = <GIC_SPI 634
 					      IRQ_TYPE_LEVEL_HIGH 0>;
 				clocks = <&dummy_clk 0>, <&dummy_clk 0>;
-- 
2.43.0.429.g432eaa2c6b-goog


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