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Message-ID: <20240119111132.1290455-6-tudor.ambarus@linaro.org>
Date: Fri, 19 Jan 2024 11:11:29 +0000
From: Tudor Ambarus <tudor.ambarus@...aro.org>
To: peter.griffin@...aro.org,
mturquette@...libre.com,
sboyd@...nel.org,
robh+dt@...nel.org,
krzysztof.kozlowski+dt@...aro.org,
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s.nawrocki@...sung.com,
tomasz.figa@...il.com,
cw00.choi@...sung.com,
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devicetree@...r.kernel.org,
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andre.draszik@...aro.org,
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Tudor Ambarus <tudor.ambarus@...aro.org>
Subject: [PATCH v4 5/8] arm64: dts: exynos: gs101: enable cmu-peric0 clock controller
Enable the cmu-peric0 clock controller. It feeds USI and I3c.
Reviewed-by: Sam Protsenko <semen.protsenko@...aro.org>
Reviewed-by: Peter Griffin <peter.griffin@...aro.org>
Signed-off-by: Tudor Ambarus <tudor.ambarus@...aro.org>
---
arch/arm64/boot/dts/exynos/google/gs101.dtsi | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/arch/arm64/boot/dts/exynos/google/gs101.dtsi b/arch/arm64/boot/dts/exynos/google/gs101.dtsi
index 4e5f4c748906..2d1344a202a9 100644
--- a/arch/arm64/boot/dts/exynos/google/gs101.dtsi
+++ b/arch/arm64/boot/dts/exynos/google/gs101.dtsi
@@ -339,6 +339,16 @@ ppi_cluster2: interrupt-partition-2 {
};
};
+ cmu_peric0: clock-controller@...00000 {
+ compatible = "google,gs101-cmu-peric0";
+ reg = <0x10800000 0x4000>;
+ #clock-cells = <1>;
+ clocks = <&ext_24_5m>,
+ <&cmu_top CLK_DOUT_CMU_PERIC0_BUS>,
+ <&cmu_top CLK_DOUT_CMU_PERIC0_IP>;
+ clock-names = "oscclk", "bus", "ip";
+ };
+
sysreg_peric0: syscon@...20000 {
compatible = "google,gs101-peric0-sysreg", "syscon";
reg = <0x10820000 0x10000>;
--
2.43.0.429.g432eaa2c6b-goog
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