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Message-Id: <1705669223-5655-3-git-send-email-quic_msarkar@quicinc.com>
Date: Fri, 19 Jan 2024 18:30:18 +0530
From: Mrinmay Sarkar <quic_msarkar@...cinc.com>
To: vkoul@...nel.org, jingoohan1@...il.com, conor+dt@...nel.org,
konrad.dybcio@...aro.org, manivannan.sadhasivam@...aro.org,
robh+dt@...nel.org
Cc: quic_shazhuss@...cinc.com, quic_nitegupt@...cinc.com,
quic_ramkri@...cinc.com, quic_nayiluri@...cinc.com,
dmitry.baryshkov@...aro.org, quic_krichai@...cinc.com,
quic_vbadigan@...cinc.com, quic_parass@...cinc.com,
quic_schintav@...cinc.com, quic_shijjose@...cinc.com,
Mrinmay Sarkar <quic_msarkar@...cinc.com>,
Gustavo Pimentel <gustavo.pimentel@...opsys.com>,
Serge Semin <fancer.lancer@...il.com>,
Lorenzo Pieralisi <lpieralisi@...nel.org>,
Krzysztof WilczyĆski <kw@...ux.com>,
Rob Herring <robh@...nel.org>, Bjorn Helgaas <bhelgaas@...gle.com>,
Kishon Vijay Abraham I <kishon@...nel.org>, dmaengine@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-pci@...r.kernel.org,
linux-arm-msm@...r.kernel.org, mhi@...ts.linux.dev
Subject: [PATCH v1 2/6] dmaengine: dw-edma: Introduce helpers for getting the eDMA/HDMA max channel count
From: Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>
Add common helpers for getting the eDMA/HDMA max channel count.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>
Signed-off-by: Mrinmay Sarkar <quic_msarkar@...cinc.com>
---
drivers/dma/dw-edma/dw-edma-core.c | 18 ++++++++++++++++++
drivers/pci/controller/dwc/pcie-designware.c | 6 +++---
include/linux/dma/edma.h | 14 ++++++++++++++
3 files changed, 35 insertions(+), 3 deletions(-)
diff --git a/drivers/dma/dw-edma/dw-edma-core.c b/drivers/dma/dw-edma/dw-edma-core.c
index 7fe1c19..2bd6e43 100644
--- a/drivers/dma/dw-edma/dw-edma-core.c
+++ b/drivers/dma/dw-edma/dw-edma-core.c
@@ -902,6 +902,24 @@ static int dw_edma_irq_request(struct dw_edma *dw,
return err;
}
+static u32 dw_edma_get_max_ch(enum dw_edma_map_format mf, enum dw_edma_dir dir)
+{
+ if (mf == EDMA_MF_HDMA_NATIVE)
+ return HDMA_MAX_NR_CH;
+
+ return dir == EDMA_DIR_WRITE ? EDMA_MAX_WR_CH : EDMA_MAX_RD_CH;
+}
+
+u32 dw_edma_get_max_rd_ch(enum dw_edma_map_format mf)
+{
+ return dw_edma_get_max_ch(mf, EDMA_DIR_READ);
+}
+
+u32 dw_edma_get_max_wr_ch(enum dw_edma_map_format mf)
+{
+ return dw_edma_get_max_ch(mf, EDMA_DIR_WRITE);
+}
+
int dw_edma_probe(struct dw_edma_chip *chip)
{
struct device *dev;
diff --git a/drivers/pci/controller/dwc/pcie-designware.c b/drivers/pci/controller/dwc/pcie-designware.c
index eca047a..96575b8 100644
--- a/drivers/pci/controller/dwc/pcie-designware.c
+++ b/drivers/pci/controller/dwc/pcie-designware.c
@@ -864,7 +864,7 @@ static int dw_pcie_edma_irq_vector(struct dw_edma_chip *edma, unsigned int nr)
char name[6];
int ret;
- if (nr >= EDMA_MAX_WR_CH + EDMA_MAX_RD_CH)
+ if (nr >= dw_edma_get_max_rd_ch(edma->mf) + dw_edma_get_max_wr_ch(edma->mf))
return -EINVAL;
ret = platform_get_irq_byname_optional(pdev, "dma");
@@ -923,8 +923,8 @@ static int dw_pcie_edma_find_chip(struct dw_pcie *pci)
pci->edma.ll_rd_cnt = FIELD_GET(PCIE_DMA_NUM_RD_CHAN, val);
/* Sanity check the channels count if the mapping was incorrect */
- if (!pci->edma.ll_wr_cnt || pci->edma.ll_wr_cnt > EDMA_MAX_WR_CH ||
- !pci->edma.ll_rd_cnt || pci->edma.ll_rd_cnt > EDMA_MAX_RD_CH)
+ if (!pci->edma.ll_wr_cnt || pci->edma.ll_wr_cnt > dw_edma_get_max_wr_ch(pci->edma.mf) ||
+ !pci->edma.ll_rd_cnt || pci->edma.ll_rd_cnt > dw_edma_get_max_rd_ch(pci->edma.mf))
return -EINVAL;
return 0;
diff --git a/include/linux/dma/edma.h b/include/linux/dma/edma.h
index 7197a58..550f6a4 100644
--- a/include/linux/dma/edma.h
+++ b/include/linux/dma/edma.h
@@ -106,6 +106,9 @@ struct dw_edma_chip {
#if IS_REACHABLE(CONFIG_DW_EDMA)
int dw_edma_probe(struct dw_edma_chip *chip);
int dw_edma_remove(struct dw_edma_chip *chip);
+
+u32 dw_edma_get_max_rd_ch(enum dw_edma_map_format mf);
+u32 dw_edma_get_max_wr_ch(enum dw_edma_map_format mf);
#else
static inline int dw_edma_probe(struct dw_edma_chip *chip)
{
@@ -116,6 +119,17 @@ static inline int dw_edma_remove(struct dw_edma_chip *chip)
{
return 0;
}
+
+static inline u32 dw_edma_get_max_rd_ch(enum dw_edma_map_format mf)
+{
+ return 0;
+}
+
+static inline u32 dw_edma_get_max_wr_ch(enum dw_edma_map_format mf)
+{
+ return 0;
+}
+
#endif /* CONFIG_DW_EDMA */
#endif /* _DW_EDMA_H */
--
2.7.4
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