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Message-ID: <CAA8EJprWHiShFpZdb+pWsCoxNvNEoP+3By2x4u8rq+ek37hJXw@mail.gmail.com>
Date: Fri, 19 Jan 2024 15:26:56 +0200
From: Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
To: Mrinmay Sarkar <quic_msarkar@...cinc.com>
Cc: vkoul@...nel.org, jingoohan1@...il.com, conor+dt@...nel.org, 
	konrad.dybcio@...aro.org, manivannan.sadhasivam@...aro.org, 
	robh+dt@...nel.org, quic_shazhuss@...cinc.com, quic_nitegupt@...cinc.com, 
	quic_ramkri@...cinc.com, quic_nayiluri@...cinc.com, quic_krichai@...cinc.com, 
	quic_vbadigan@...cinc.com, quic_parass@...cinc.com, quic_schintav@...cinc.com, 
	quic_shijjose@...cinc.com, Gustavo Pimentel <gustavo.pimentel@...opsys.com>, 
	Serge Semin <fancer.lancer@...il.com>, Lorenzo Pieralisi <lpieralisi@...nel.org>, 
	Krzysztof WilczyƄski <kw@...ux.com>, 
	Rob Herring <robh@...nel.org>, Bjorn Helgaas <bhelgaas@...gle.com>, 
	Kishon Vijay Abraham I <kishon@...nel.org>, dmaengine@...r.kernel.org, linux-kernel@...r.kernel.org, 
	linux-pci@...r.kernel.org, linux-arm-msm@...r.kernel.org, mhi@...ts.linux.dev
Subject: Re: [PATCH v1 2/6] dmaengine: dw-edma: Introduce helpers for getting
 the eDMA/HDMA max channel count

On Fri, 19 Jan 2024 at 15:00, Mrinmay Sarkar <quic_msarkar@...cinc.com> wrote:
>
> From: Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>
>
> Add common helpers for getting the eDMA/HDMA max channel count.
>
> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>
> Signed-off-by: Mrinmay Sarkar <quic_msarkar@...cinc.com>
> ---
>  drivers/dma/dw-edma/dw-edma-core.c           | 18 ++++++++++++++++++
>  drivers/pci/controller/dwc/pcie-designware.c |  6 +++---
>  include/linux/dma/edma.h                     | 14 ++++++++++++++
>  3 files changed, 35 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/dma/dw-edma/dw-edma-core.c b/drivers/dma/dw-edma/dw-edma-core.c
> index 7fe1c19..2bd6e43 100644
> --- a/drivers/dma/dw-edma/dw-edma-core.c
> +++ b/drivers/dma/dw-edma/dw-edma-core.c
> @@ -902,6 +902,24 @@ static int dw_edma_irq_request(struct dw_edma *dw,
>         return err;
>  }
>
> +static u32 dw_edma_get_max_ch(enum dw_edma_map_format mf, enum dw_edma_dir dir)
> +{
> +       if (mf == EDMA_MF_HDMA_NATIVE)
> +               return HDMA_MAX_NR_CH;

This will break unless patch 5 is applied. Please move the
corresponding definition to this path.

> +
> +       return dir == EDMA_DIR_WRITE ? EDMA_MAX_WR_CH : EDMA_MAX_RD_CH;
> +}
> +
> +u32 dw_edma_get_max_rd_ch(enum dw_edma_map_format mf)
> +{
> +       return dw_edma_get_max_ch(mf, EDMA_DIR_READ);
> +}
> +
> +u32 dw_edma_get_max_wr_ch(enum dw_edma_map_format mf)
> +{
> +       return dw_edma_get_max_ch(mf, EDMA_DIR_WRITE);
> +}
> +
>  int dw_edma_probe(struct dw_edma_chip *chip)
>  {
>         struct device *dev;


-- 
With best wishes
Dmitry

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