linux-kernel - Re: [PATCH 1/3] dt-bindings: clock: s32g: add uSDHC clock IDs

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Date: Fri, 19 Jan 2024 16:11:37 +0000
From: Conor Dooley <conor@...nel.org>
To: "Ghennadi Procopciuc (OSS)" <ghennadi.procopciuc@....nxp.com>
Cc: Chester Lin <chester62515@...il.com>, Andreas Farber <afaerber@...e.de>,
	Matthias Brugger <mbrugger@...e.com>,
	Shawn Guo <shawnguo@...nel.org>,
	Sascha Hauer <s.hauer@...gutronix.de>,
	Fabio Estevam <festevam@...il.com>,
	Rob Herring <robh+dt@...nel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
	Conor Dooley <conor+dt@...nel.org>,
	Michael Turquette <mturquette@...libre.com>,
	Stephen Boyd <sboyd@...nel.org>, NXP S32 Linux Team <s32@....com>,
	Pengutronix Kernel Team <kernel@...gutronix.de>,
	NXP Linux Team <linux-imx@....com>,
	linux-arm-kernel@...ts.infradead.org, devicetree@...r.kernel.org,
	linux-kernel@...r.kernel.org, linux-clk@...r.kernel.org,
	Ghennadi Procopciuc <ghennadi.procopciuc@....com>,
	Ciprian Costea <ciprianmarian.costea@....com>
Subject: Re: [PATCH 1/3] dt-bindings: clock: s32g: add uSDHC clock IDs

On Fri, Jan 19, 2024 at 03:02:28PM +0200, Ghennadi Procopciuc (OSS) wrote:
> From: Ghennadi Procopciuc <ghennadi.procopciuc@....com>
> 
> Add the SCMI clock IDs for the uSDHC controller present on
> S32G SoCs.
> 
> Signed-off-by: Ciprian Costea <ciprianmarian.costea@....com>
> Signed-off-by: Ghennadi Procopciuc <ghennadi.procopciuc@....com>
> ---
>  include/dt-bindings/clock/s32g-scmi-clock.h | 14 ++++++++++++++
>  1 file changed, 14 insertions(+)
>  create mode 100644 include/dt-bindings/clock/s32g-scmi-clock.h
> 
> diff --git a/include/dt-bindings/clock/s32g-scmi-clock.h b/include/dt-bindings/clock/s32g-scmi-clock.h
> new file mode 100644
> index 000000000000..739f98a924c3
> --- /dev/null
> +++ b/include/dt-bindings/clock/s32g-scmi-clock.h
> @@ -0,0 +1,14 @@
> +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) */
> +/*
> + * Copyright 2020-2024 NXP
> + */
> +#ifndef _DT_BINDINGS_SCMI_CLK_S32G_H
> +#define _DT_BINDINGS_SCMI_CLK_S32G_H
> +
> +/* uSDHC */
> +#define S32G_SCMI_CLK_USDHC_AHB		31
> +#define S32G_SCMI_CLK_USDHC_MODULE	32
> +#define S32G_SCMI_CLK_USDHC_CORE	33
> +#define S32G_SCMI_CLK_USDHC_MOD32K	34

Why do these numbers not start at 0?

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