linux-kernel - Re: [PATCH 02/11] dt-bindings: gpu: Add PowerVR Series5 SGX GPUs

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite for Android: free password hash cracker in your pocket

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <20240119174815.GA633343-robh@kernel.org>
Date: Fri, 19 Jan 2024 11:48:15 -0600
From: Rob Herring <robh@...nel.org>
To: Tony Lindgren <tony@...mide.com>
Cc: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>,
	Andrew Davis <afd@...com>, Frank Binns <frank.binns@...tec.com>,
	Matt Coster <matt.coster@...tec.com>,
	"H . Nikolaus Schaller" <hns@...delico.com>,
	Adam Ford <aford173@...il.com>,
	Ivaylo Dimitrov <ivo.g.dimitrov.75@...il.com>,
	Maarten Lankhorst <maarten.lankhorst@...ux.intel.com>,
	Maxime Ripard <mripard@...nel.org>,
	Thomas Zimmermann <tzimmermann@...e.de>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
	Conor Dooley <conor+dt@...nel.org>, Chen-Yu Tsai <wens@...e.org>,
	Jernej Skrabec <jernej.skrabec@...il.com>,
	Samuel Holland <samuel@...lland.org>,
	Benoît Cousson <bcousson@...libre.com>,
	Nishanth Menon <nm@...com>, Vignesh Raghavendra <vigneshr@...com>,
	Tero Kristo <kristo@...nel.org>,
	Paul Cercueil <paul@...pouillou.net>,
	dri-devel@...ts.freedesktop.org, devicetree@...r.kernel.org,
	linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
	linux-sunxi@...ts.linux.dev, linux-omap@...r.kernel.org,
	linux-mips@...r.kernel.org
Subject: Re: [PATCH 02/11] dt-bindings: gpu: Add PowerVR Series5 SGX GPUs

On Wed, Jan 10, 2024 at 10:38:57AM +0200, Tony Lindgren wrote:
> * Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org> [240109 19:53]:
> > On 09/01/2024 18:19, Andrew Davis wrote:
> > > The Imagination PowerVR Series5 "SGX" GPU is part of several SoCs from
> > > multiple vendors. Describe how the SGX GPU is integrated in these SoC,
> > > including register space and interrupts. Clocks, reset, and power domain
> > > information is SoC specific.
> > > 
> > > Signed-off-by: Andrew Davis <afd@...com>
> > > Reviewed-by: Javier Martinez Canillas <javierm@...hat.com>
> > 
> > 
> > > +  clock-names:
> > > +    minItems: 1
> > > +    items:
> > > +      - const: core
> > > +      - const: mem
> > > +      - const: sys
> > 
> > There are no devices currently using third clock, but I assume it is
> > expected or possible.
> 
> I think the third clock is typically merged with one of the two clocks but
> yeah possibly it's a separate clocke in some cases.
> 
> > Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
> 
> Looks good to me too.
> 
> So for merging these, as many of the changes touch the omap variants, I
> could set up an immutable branch with all the changes after -rc1. Or I can
> ack the patches too if somebody has better ideas.

Just take all but patches 10 and 11. I don't think it matters if the 
binding is there for them as long as it is all there in next. No one is 
paying that close attention to the warnings I think.

Rob